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Computing with a trillion crummy components
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Communications of the ACM archive
Volume 50 ,  Issue 9  (September 2007) table of contents
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SPECIAL ISSUE: Beyond silicon: new computing paradigms table of contents
Pages: 35 - 39  
Year of Publication: 2007
ISSN:0001-0782
Authors
Warren Robinett  Hewlett-Packard Labs in Palo Alto, CA
Gregory S. Snider  Hewlett-Packard Labs in Palo Alto, CA
Philip J. Kuekes  Hewlett-Packard Labs in Palo Alto, CA
R. Stanley Williams  Hewlett-Packard Labs in Palo Alto, CA
Publisher
ACM  New York, NY, USA
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APPENDICES and SUPPLEMENTS
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ABSTRACT

Attempting to build nanometer-scale circuits that are both defect- and fault-tolerant.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
Chakraborty, K. and Mazumder, P. Fault Tolerance and Reliability Techniques for High-Density Random-Access Memories. Prentice Hall, 2002.
 
2
Chen, Y. et al. Nanoscale molecular switch devices fabricated by imprint lithography. Applied Physics Letters 82 (2003), 1610--1612.
 
3
Heath, J.R., Kuekes, P.J., Snider, G.S., and Williams, R.S. A defect-tolerant computer architecture: Opportunities for nanotechnology. Science 280 (1998), 1716.
 
4
Kuekes, P.J., Robinett, W., Seroussi, G., and Williams R.S. Defect-tolerant interconnect to nanoelectronic circuits: Internally-redundant demultiplexers based on error-correcting codes. Nanotechnology 16 (2005), 869.
 
5
Kuekes, P.J. and Williams, R.S. Demultiplexer for a molecular wire crossbar network. U.S. Patent No. 6,256,767 (July 3, 2001).
 
6
Moore, E.F. and Shannon, C.E. Reliable circuits using less reliable relays. Journal of the Franklin Institute (1956), 191--208, 281--297.
 
7
 
8
Snider, G.S. and Williams, R.S. Nano/CMOS architectures using field-programmable nanowire interconnect. Nanotechnology, 2006.
 
9
Strukov, D.B. and Likharev, K.K. CMOL FPGA: A cell-based, reconfigurable architecture for hybrid digital circuits using two-terminal nanodevices. Nanotechnology; preprint available at rsfq1.physics.sunysb.edu/likharev/nano/FPGA05.pdf.
 
10
Strukov, D.B. and Likharev, K.K. A reconfigurable architecture for hybrid CMOS/nanodevice circuits. In Proceedings of FCCM'05 (Napa Valley, CA, April 2005); preprint available at rsfq1.physics.sunysb.edu/likharev/nano/FCCM2005.pdf.
 
11
Strukov, D.B. and Likharev, K.K. Prospects for terabit-scale nanoelectronics memories. Nanotechnology 16, 137 (2005).
 
12
von Neumann, J. Probabilistic logics and the synthesis of reliable organisms from unreliable components. In C.E. Shannon and J. McCarthy, Eds., Automata Studies (1955), 43--98.

Collaborative Colleagues:
Warren Robinett: colleagues
Gregory S. Snider: colleagues
Philip J. Kuekes: colleagues
R. Stanley Williams: colleagues