TrACS: transceiver architecture and wireless channel simulator

ABSTRACT

This paper presents the design of a system-level simulator for radio receivers, including receiver circuits, in Matlab. The system level outlook offers a better characterization of circuit design, as the signal processing in the digital receiver is asymmetric across topologies. Also, circuit models in the simulator make it more precise and realistic compared to baseband models, which assume a single-step error-free down conversion. This interpretation is especially relevant in the design of energy-constrained wireless sensor network solutions. The simulator results for binary FSK in AWGN confirm the importance of system level simulation.

REFERENCES

• 1: ADS Ptolemy-eesof.tm.agilent.com/docs/adsdoc2004A/ pdf/ptolemy.pdf
• 2: Akyildiz, I.F, Su, W., Sankarasubramaniam, Y., and Cayirci, E. A Survey on Sensor Networks. IEEE Communications Magazine, (Aug. 2002).
• 3: Asada, G. et al. Wireless Integrated Network Sensors: Low Power Systems on a Chip. Proc. ESSCIRC'98. (1998).
• 4: Chong, C.Y., and Kumar, S.P. Sensor Networks: Evolution, Oppurtunities and Challenges. Proc. of the IEEE, Vol. 91, No. 8 (Aug. 2003), 1247--1256.
• 5: Crols, J., and Stayeart, M.S.J. Low-IF topologies for high performance analog front ends of fully integrated receivers. IEEE Transactions on Circuits and Systems-II. Analog and Digital SignalProcessing, Vol.45, No.3 (March 1998).
• 6: Christian C. Enz , Amre El-Hoiydi , Jean-Dominique Decotignie , Vincent Peiris, WiseNET: An Ultralow-Power Wireless Sensor Network Solution, Computer, v.37 n.8, p.62-70, August 2004 [doi>10.1109/MC.2004.109]
• 7: Enz C.C., Scolari, N., and Yodprasit, U. Ultra Low-Power Radio Design for Wireless Sensor Networks. IEEE International Workshop on Radio-Frequency Integration Technology (2005).
• 8: Goldsmith, A.J., and Wicker, S.B. Design Challenges for Energy-Constrained Ad Hoc Wireless Networks. IEEE Wireless Communications. (Aug 2002).
• 9: Karlsson, G., Lindfors, S., Skoglund, M., and Oien, G. Cross-Layer Optimization in Short-Range Wireless Sensor Networks (CROPS). www.ee.kth.se/commth/projects/ CROPS/docs/Technical.pdf
• 10: Lin, T.H., Kaiser, W.J., and Pottie, G.J. Integrated low-power communication system design for wireless sensor networks. Communications Magazine, IEEE, vol. 42, Issue 12 (Dec. 2004), 142--150.
• 11: Seok-Bae Park , Mohammed Ismail, DC offsets in direct conversion multistandard wireless receivers: Modeling and cancellation, Analog Integrated Circuits and Signal Processing, v.49 n.2, p.123-130, October 2006 [doi>10.1007/s10470-006-9642-z]
• 12: Jan M. Rabaey , M. Josie Ammer , Julio L. da Silva , Danny Patel , Shad Roundy, PicoRadio Supports Ad Hoc Ultra-Low Power Wireless Networking, Computer, v.33 n.7, p.42-48, July 2000 [doi>10.1109/2.869369]
• 13: Behzad Razavi, RF microelectronics, Prentice-Hall, Inc., Upper Saddle River, NJ, 1998
• 14: Sadler, B.M. Fundamentals of Energy-Constrained Sensor Network Systems. IEEE A&E Systems Magazine, vol. 20, no. 8 (Aug. 2005) Part 2: Tutorials-Sadler.
• 15: Eugene Shih , Seong-Hwan Cho , Nathan Ickes , Rex Min , Amit Sinha , Alice Wang , Anantha Chandrakasan, Physical layer driven protocol and algorithm design for energy-efficient wireless sensor networks, Proceedings of the 7th annual international conference on Mobile computing and networking, p.272-287, July 2001, Rome, Italy [doi>10.1145/381677.381703]
• 16: Shinagawa, M., Akazawa, Y., and Wakimoto, T. Jitter Analysis of High-speed Sampling Systems. IEEE J. of, Solid-State Circuits, vo1.25, no. 1 (Feb. 1990), 224--226.
• 17: Sun, Y.R., and Signell, S. Effects of noise and jitter on algorithms for bandpass sampling in radio receivers. Proceedings of the International Symposium on Circuits and Systems, vol. 1, (June 2004), 208--211.
• 18: Thoonen, G., Lopelli, E., van der Tang, J., and van Roermund, A. System level considerations for Ultra-low power transmitter-only wireless networks in the indoor environment. w3.ele.tue.nl/fileadmin/ele/ICS/MsM /Files/Lopelli/Prorisc_Thoonen.pdf

INDEX TERMS

Primary Classification:
  B. Hardware
  B.4 INPUT/OUTPUT AND DATA COMMUNICATIONS
      B.4.4 Performance Analysis and Design Aids**

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.2 Design Aids
          Subjects: Verification

General Terms:
Design, Performance, Theory, Verification

Keywords:
performance verification, receiver, simulator, system level design, transceiver circuits, wireless sensor node design