Meeting with the forthcoming IC design

ABSTRACT

In the foreseeable future, VLSI design will meet a couple of explosions: power, variability and NRE (non-recurring engineering cost). Some of the solutions for power-aware designs are covered in this talk with relation to variability. A remedy for the NRE explosion is to reduce the number of developments and manufacture and sell tens of millions of chips under a fixed design. System-in-a-Package approach may embody such possibility. Several new technologies are described to enable 3-dimensional stacking of chips to build high-performance yet low-power electronics systems. On the other extreme of the silicon VLSI's which stay as small as a centimeter square, a new domain of electronics called large-area integrated circuit as large as meters is waiting, which may open up a new continent of applications in the era of ubiquitous electronics. One of the implementations of the large-area electronics is based on organic transistors. The talk will provide perspectives of the organic circuit design taking E-skin, sheet-type scanner, Braille display and wireless power transmission sheet as examples.

INDEX TERMS

Primary Classification:
  B. Hardware
  B.0 GENERAL

General Terms:
Design

Keywords:
3D chip stack, SiP, large-area electronics, organic circuits, scaling issues