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On the selection of arithmetic unit structure in voltage overscaled soft digital signal processing
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International Symposium on Low Power Electronics and Design archive
Proceedings of the 2007 international symposium on Low power electronics and design table of contents
Portland, OR, USA
SESSION: Signal processing, wireless, and communication table of contents
Pages: 250 - 255  
Year of Publication: 2007
ISBN:978-1-59593-709-4
Authors
Yang Liu  Rensselaer Polytechnic Institute
Tong Zhang  Rensselaer Polytechnic Institute
Sponsors
ACM: Association for Computing Machinery
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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ABSTRACT

A soft digital signal processing (DSP) design paradigm has been recently proposed to reduce the energy consumption of DSP systems through voltage overscaling. This paper shows that the selection of arithmetic unit structure can be an important and non-trivial issue in soft DSP system design. We present an optimal formulation and propose sub-optimal low-complexity approximations for selecting the appropriate arithmetic unit structure in voltage overscaled signal processing systems. We further present a case study on choosing the appropriate MAC (multiply-accumulate) structure in voltage overscaled FIR (finite impulse response) filter.


REFERENCES

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