| Speed scaling for weighted flow time |
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Symposium on Discrete Algorithms
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Proceedings of the eighteenth annual ACM-SIAM symposium on Discrete algorithms
table of contents
New Orleans, Louisiana
Pages: 805 - 813
Year of Publication: 2007
ISBN:978-0-898716-24-5
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Society for Industrial and Applied Mathematics
Philadelphia, PA, USA
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Downloads (6 Weeks): 7, Downloads (12 Months): 78, Citation Count: 8
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ABSTRACT
In addition to the traditional goal of efficiently managing time and space, many computers now need to efficiently manage power usage. For example, Intel's SpeedStep and AMD's PowerNOW technologies allow the Windows XP operating system to dynamically change the speed of the processor to prolong battery life. In this setting, the operating system must not only have a job selection policy to determine which job to run, but also a speed scaling policy to determine the speed at which the job will be run. These policies must be online since the operating system does not in general have knowledge of the future. In current CMOS based processors, the speed satisfies the well known cube-root-rule, that the speed is approximately the cube root of the power [Mud01, BBS+00]. Thus, in this work, we make the standard generalization that the power is equal to speed to some power α ≥ 1, where one should think of α as being approximately 3 [YDS95, BKP04]. Energy is power integrated over time. The operating system is faced with a dual objective optimization problem as it both wants to conserve energy, and optimize some Quality of Service (QoS) measure of the resulting schedule.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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{AF06} Susanne Albers and Hiroshi Fujiwara. Energy-efficient algorithms for flow time minimization. In Lecture Notes in Computer Science (STACS), volume 3884, pages 621--633, 2006.
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David M. Brooks , Pradip Bose , Stanley E. Schuster , Hans Jacobson , Prabhakar N. Kudva , Alper Buyuktosunoglu , John-David Wellman , Victor Zyuban , Manish Gupta , Peter W. Cook, Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors, IEEE Micro, v.20 n.6, p.26-44, November 2000
[doi> 10.1109/40.888701]
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{PvSU05} Kirk Pruhs, Rob van Stee, and Patchrawat Uthaisombut. Speed scaling of tasks with precedence constraints. In Workshop on Approximation and Online Algorithms, 2005.
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