| Simultaneous multi-topology multi-objective sizing across thousands of analog circuit topologies |
| Full text |
Pdf
(643 KB)
|
| Source
|
Annual ACM IEEE Design Automation Conference
archive
Proceedings of the 44th annual Design Automation Conference
table of contents
San Diego, California
SESSION: Mixed-signal modeling, methodology and synthesis
table of contents
Pages: 944 - 947
Year of Publication: 2007
ISBN ~ ISSN:0738-100X , 978-1-59593-627-1
|
|
Authors
|
|
| Sponsors |
|
| Publisher |
|
| Bibliometrics |
Downloads (6 Weeks): 5, Downloads (12 Months): 36, Citation Count: 5
|
|
|
ABSTRACT
This paper presents MOJITO, a system which optimizes across thousands of analog circuit topologies simultaneously, and returns a set of sized topologies that collectively provide a performance tradeoff. MOJITO defines a space of possible topologies as a hierarchically organized combination of trusted analog building blocks. To minimize the setup burden: no topology selection rules or abstract behaviors need to be specified, and performance calculations are SPICE-based. The search algorithm is a novel multi-objective evolutionary algorithm that uses an age-layered population structure to balance exploration vs. exploitation. Results are shown for a space having 3528 one- and two-stage operational amplifier topologies.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
| |
1
|
|
| |
2
|
E. Berkcan , M. d'Abreu , W. Laughton, Analog compilation based on successive decompositions, Proceedings of the 25th ACM/IEEE conference on Design automation, p.369-375, June 12-15, 1988, Atlantic City, New Jersey, United States
|
| |
3
|
T. R. Dastidar et al, "A Synthesis System for Analog Circuits Based on Evolutionary Search and Topological Reuse," IEEE Trans. Ev. Comp. 9(2), April 2005, pp. 211--224
|
| |
4
|
B. De Smedt and G. Gielen, "WATSON: Design Space Boundary Exploration and Model Generation for Analog and RFIC Design," IEEE Trans. CAD 22(2), 2003, pp. 213--224
|
| |
5
|
K. Deb et al., "A Fast and Elitist Multi-Objective Genetic Algorithm: NSGA-II," IEEE Trans. Ev. Comp. 6(2), 2002
|
| |
6
|
P. Drennan et al., "Implications of Proximity Effects for Analog Design", Proc. CICC, 2006
|
| |
7
|
Tom Eeckelaert , Raf Schoofs , Georges Gielen , Michiel Steyaert , Willy Sansen, An efficient methodology for hierarchical synthesis of mixed-signal systems with fully integrated building block topology selection, Proceedings of the conference on Design, automation and test in Europe, April 16-20, 2007, Nice, France
|
| |
8
|
F. M. El-Turky, R. A. Nordin, "BLADES: An Expert System For Analog Circuit Design," Proc. ISCAS, 1986, pp.552--555
|
| |
9
|
R. Harjani et al., "OASYS: A Framework for Analog Circuit Synthesis," IEEE Trans. CAD 8(12), pp. 1247--1266, 1992
|
 |
10
|
|
| |
11
|
H. Y. Koh et al., "OPASYN: A Compiler for CMOS Operational Amplifiers," IEEE Trans. CAD vol. 9, Feb 1990
|
| |
12
|
J. R. Koza et al. Genetic Programming IV. Kluwer, 2003
|
 |
13
|
|
| |
14
|
P. C. Maulik et al., "Integer Programming Based Topology Selection of Cell Level Analog Circuits", IEEE Trans. CAD 14(4), April 1995
|
| |
15
|
T. McConaghy and G. Gielen, "Genetic Programming in Industrial Analog CAD: Applications and Challenges", Genetic Programming Theory and Practice III, Riolo et al, eds., Springer, 2005, ch. 19
|
| |
16
|
Z. Ning et al., "SEAS: A Simulated Evolution Approach for Analog Circuit Synthesis," Proc. CICC, 1991
|
| |
17
|
B. Razavi, Design of Analog CMOS Integrated Circuits. McGraw-Hill, 2000
|
| |
18
|
|
| |
19
|
A. H. Shah et al., "High-Performance CMOS-Amplifier Design Uses Front-To-Back Analog Flow," EDN, Oct, 2002
|
| |
20
|
T. Sripramong and C. Toumazou, "The Invention of CMOS Amplifiers Using Genetic Programming and Current-Flow Analysis," IEEE Trans. CAD 21(11), 2002, pp. 1237--1252
|
| |
21
|
K. Swings et al., "HECTOR: a Hierarchical Topology-Construction Program for Analog Circuits Based on a Declarative Approach to Circuit Modeling," CICC, 1991
|
 |
22
|
|
| |
23
|
C. Toumazou et al, "ISAID -- A Methodology for Automated Analog IC Design," Proc. ISCAS, vol. 1, 1990, pp. 531--555.
|
|