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Analysis and optimization of sleep modes in subthreshold circuit design
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 44th annual Design Automation Conference table of contents
San Diego, California
SESSION: Circuit level power analysis and low power design table of contents
Pages: 694 - 699  
Year of Publication: 2007
ISBN ~ ISSN:0738-100X , 978-1-59593-627-1
Authors
Mingoo Seok  University of Michigan, Ann Arbor, MI
Scott Hanson  University of Michigan, Ann Arbor, MI
Dennis Sylvester  University of Michigan, Ann Arbor, MI
David Blaauw  University of Michigan, Ann Arbor, MI
Sponsors
: The EDA Consortium
: IEEE/CASS/CANDE/CEDA
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 9,   Downloads (12 Months): 64,   Citation Count: 3
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ABSTRACT

Subthreshold operation is a promising method for reducing power consumption in ultra-low power applications, such as active RFIDs and sensor networks. It was shown in previous works that operating at the Vmin supply voltage results in optimal energy operation, where Vmin typically falls below the threshold voltage. However, all previous subthreshold analyses ignore the leakage current in standby mode. Hence, for applications where operation at Vmin results in completion of the task well ahead of the required deadline, the energy consumption can be significantly under-estimated. In this paper, we investigate the effect of the non-zero standby energy on the optimal energy consumption in subthreshold operation. We first analyze energy consumption both with and without a cutoff technique in standby mode. Two parameters are proposed to capture the cutoff structure's effect on the energy consumption. Second, a methodology to minimize the total energy consumption is addressed. The selection of the cutoff structure is examined by comparing three different structures. Then, a co-optimization method to optimize the size of the cutoff structure concurrently with the supply voltage, is proposed. This approach reduces energy by 99.2% compared to standby-energy-unaware optimization.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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A. Wang, A. Chandrakasan, "A 180-mV subthreshold FFT processor using a minimum energy design methodology", IEEE J. Solid-State Circuits, vol.40, no.1, pp.310--319, Jan 2005
 
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B. Zhai, L. Nazhadili, J. Olson, A Reeves, M Minuth, R Helfand, S. Pant, D. Blaauw, T. Austin, "A 2.60pJ/Inst Subthreshold Sensor Processor for Optimal Energy Efficiency", Symp. On VLSI Circuits, pp. 154--155, 2006
 
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L. Nazhadili, M. Minuth, T. Austin, "SenseBench: toward an accurate evaluation of sensor network processors", Workload Characterization Symposium, pp. 197--203, Oct, 2005
 
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H. Chung, E. Hong, K. Kim, S. Cho, "Optimum Supply Voltage and Sleep Transistor Sizing for Energy Minimization in Latency-Constrained MTCMOS Circuits", International Symposium on System-On-Chip, pp.365--368, Nov, 2006
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B. C. Paul, A. Raychowdhury, K. Roy, "Device optimization for digital subthreshold logic operation," IEEE Trans. Elect. Devices, pp. 237--247, Feb, 2005
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Collaborative Colleagues:
Mingoo Seok: colleagues
Scott Hanson: colleagues
Dennis Sylvester: colleagues
David Blaauw: colleague listing is not available.