| Analog placement based on novel symmetry-island formulation |
| Full text |
Pdf
(284 KB)
|
| Source
|
Annual ACM IEEE Design Automation Conference
archive
Proceedings of the 44th annual Design Automation Conference
table of contents
San Diego, California
SESSION: Modern placement techniques
table of contents
Pages: 465 - 470
Year of Publication: 2007
ISBN ~ ISSN:0738-100X , 978-1-59593-627-1
|
|
Authors
|
|
Po-Hung Lin
|
National Taiwan University, Taipei, Taiwan and Springsoft, Inc., Hsinchu, Taiwan
|
|
Shyh-Chang Lin
|
Springsoft, Inc., Hsinchu, Taiwan
|
|
| Sponsors |
|
| Publisher |
|
| Bibliometrics |
Downloads (6 Weeks): 6, Downloads (12 Months): 36, Citation Count: 3
|
|
|
ABSTRACT
In this paper, we present the first amortized linear-time packing algorithm for the placement with symmetry constraints. We first introduce the concept of a symmetry island which is formed by modules of the same symmetry group in a single connected placement. Based on this concept and the B*-tree representation, we propose automatically symmetric-feasible B*-trees (ASF-B*-trees) to directly model the placement of a symmetry island. Unlike the previous works that can handle only 1D symmetry constraints, our ASF-B*-tree is the first in the literature to additionally consider 2D symmetry. We then present hierarchical B*-trees (HB*-trees) which can simultaneously optimize the placement with both symmetry islands and non-symmetry modules. Unlike the previous works, our approach can guarantee the close proximity of symmetry modules and significantly reduce the search space based on the symmetry-island formulation. In particular, the packing time for an ASF-B*-tree or an HB*-tree is the same as that for a plain B*-tree (only amortized linear) and much faster than previous works which need at least loglinear time. Experimental results show that our approach achieves the best published quality and runtime efficiency for analog placement.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
| |
1
|
F. Balasa and K. Lampaert, "Symmetry within the sequence-pair representation in the context of placement for analog design," IEEE TCAD, vol. 19, no. 3, pp. 721--731, Jul. 2000.
|
| |
2
|
|
 |
3
|
|
 |
4
|
|
| |
5
|
F. Balasa, S. C. Maruvada, and K. Krishnamoorthy, "On the exploration IEEE TCAD, vol. 23, no. 2, pp. 177--191, Feb. 2004.
|
 |
6
|
Yun-Chih Chang , Yao-Wen Chang , Guang-Ming Wu , Shu-Wei Wu, B*-Trees: a new representation for non-slicing floorplans, Proceedings of the 37th conference on Design automation, p.458-463, June 05-09, 2000, Los Angeles, California, United States
[doi> 10.1145/337292.337541]
|
| |
7
|
J. M. Cohn, D. J. Garrod, R. A. Rutenbar, and L. R. Charley, "KOAN/ANAGRAM II: New tools for device-level analog placement and routing," IEEE JSSC, vol. 26, pp. 330--342, Mar. 1991.
|
| |
8
|
S. Kirkpatrick, C. D. Gelatt, and M. P. Vecchi, "Optimization by Simulated Annealing," Science, vol. 220, no. 4598, pp. 671--680, May 1983.
|
 |
9
|
|
| |
10
|
J.-M. Lin, H.-E. Yi, and Y.-W. Chang, "Module placement with boundary constraints using B*-trees," IEE Proceedings -- Circuits, Devices and Systems, vol. 149, no. 4, pp. 251--256, Aug. 2002.
|
 |
11
|
|
| |
12
|
S. C. Maruvada, A. Berkman, K. Krishnamoorthy, and F. Balasa, "Deterministic skip lists in analog topological placement," Proc. ASICON, pp. 756--759, Oct. 2005.
|
 |
13
|
Yingxin Pang , Florin Balasa , Koen Lampaert , Chung-Kuan Cheng, Block placement with symmetry constraints based on the O-tree non-slicing representation, Proceedings of the 37th conference on Design automation, p.464-467, June 05-09, 2000, Los Angeles, California, United States
[doi> 10.1145/337292.337545]
|
 |
14
|
|
 |
15
|
|
CITED BY 4
|
|
|
|
|
|
|
|
Martin Strasser , Michael Eick , Helmut Gräb , Ulf Schlichtmann , Frank M. Johannes, Deterministic analog circuit placement using hierarchically bounded enumeration and enhanced shape functions, Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design, November 10-13, 2008, San Jose, California
|
|
|
|
|