| The impact of NBTI on the performance of combinational and sequential circuits |
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Annual ACM IEEE Design Automation Conference
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Proceedings of the 44th annual Design Automation Conference
table of contents
San Diego, California
SESSION: Reliable design and CAD solutions for circuit aging
table of contents
Pages: 364 - 369
Year of Publication: 2007
ISBN ~ ISSN:0738-100X , 978-1-59593-627-1
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Authors
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Wenping Wang
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Arizona State University, Tempe, AZ
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Shengqi Yang
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Peking University, Beijing, China
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Sarvesh Bhardwaj
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Arizona State University, Tempe, AZ
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Rakesh Vattikonda
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Arizona State University, Tempe, AZ
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Sarma Vrudhula
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Arizona State University, Tempe, AZ
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Frank Liu
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IBM Austin Research Lab, Austin, TX
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Yu Cao
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Arizona State University, Tempe, AZ
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Downloads (6 Weeks): 18, Downloads (12 Months): 140, Citation Count: 9
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ABSTRACT
Negative-bias-temperature-instability (NBTI) has become the primary limiting factor of circuit lifetime. In this work, we develop a general framework for analyzing the impact of NBTI on the performance of a circuit, based on various circuit parameters such as the supply voltage, temperature, and node switching activity of the signals etc. We propose an efficient method to predict the degradation of circuit performance based on circuit topology and the switching activity of the signals over long periods of time. We demonstrate our results on ISCAS benchmarks and a 65nm industrial design. The framework is used to provide key design insights for designing reliable circuits. The key design insights that we obtain are: (1) degradation due to NBTI is most sensitive on the input patterns and the duty cycle; the difference in the delay degradation can be up to 5X for various static and dynamic conditions, (2) during dynamic operation, NBTI-induced degradation is relatively insensitive to supply voltage, but strongly dependent on temperature; (3) NBTI has marginal impact on the clock signal.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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M. A. Alam and S. Mahapatra. A comprehensive model of PMOS NBTI degradation. Microelectronics Reliability, 45:71--81, Aug. 2005.
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S. Bhardwaj, W. Wang, R. Vattikonda, Y. Cao, and S. Vrudhula. Predictive modeling of the nbti effect for reliable design. IEEE Custom Integrated Circuits Conference, pages 189--192, Sep. 2006.
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A. T. Krishnan, C. Chancellor, S. Chakravarthi, P. E. Nicollian, V. Reddy, and A. Varghese. Material dependence of hydrogen diffusion: Implication for nbti degradation. IEEE International Electron Devices Meeting, Dec. 2005.
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B. C. Paul, K. Kang, H. Kufluoglu, M. A. Alam, and K. Roy. Impact of NBTI on the temporal performance degradation of digital circuits. IEEE Electronic Device Letters, 26(8):560--562, Aug. 2005.
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Bipul C. Paul , Kunhyuk Kang , Haldun Kufluoglu , Muhammad Ashraful Alam , Kaushik Roy, Temporal performance degradation under NBTI: estimation and design for improved reliability of nanoscale circuits, Proceedings of the conference on Design, automation and test in Europe: Proceedings, March 06-10, 2006, Munich, Germany
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CITED BY 9
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Hamed Abrishami , Safar Hatami , Behnam Amelifard , Massoud Pedram, NBTI-aware flip-flop characterization and design, Proceedings of the 18th ACM Great Lakes symposium on VLSI, May 04-06, 2008, Orlando, Florida, USA
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Avinash Karanth Kodi , Ashwini Sarathy , Ahmed Louri , Janet Wang, Adaptive inter-router links for low-power, area-efficient and reliable Network-on-Chip (NoC) architectures, Proceedings of the 2009 Conference on Asia and South Pacific Design Automation, January 19-22, 2009, Yokohama, Japan
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Michael DeBole , K. Ramakrishnan , Varsha Balakrishnan , Wenping Wang , Hong Luo , Yu Wang , Yuan Xie , Yu Cao , N. Vijaykrishnan, A framework for estimating NBTI degradation of microarchitectural components, Proceedings of the 2009 Conference on Asia and South Pacific Design Automation, January 19-22, 2009, Yokohama, Japan
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INDEX TERMS
Primary Classification:
B.
Hardware
B.7
INTEGRATED CIRCUITS
B.7.2
Design Aids
Additional Classification:
B.
Hardware
B.8
Performance and Reliability
B.8.1
Reliability, Testing, and Fault-Tolerance
B.8.2
Performance Analysis and Design Aids
General Terms:
Design,
Experimentation,
Performance,
Reliability
Keywords:
NBTI,
duty cycle,
input pattern,
performance degradation,
speed,
supply voltage,
temperature
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