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A control theoretic approach to energy-efficient pipelined computation in MPSoCs
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ACM Transactions on Embedded Computing Systems (TECS) archive
Volume 6 ,  Issue 4  (September 2007) table of contents
Special Section LCTES'05
Article No. 27  
Year of Publication: 2007
ISSN:1539-9087
Authors
Salvatore Carta  University of Cagliari, Italy
Andrea Alimonda  University of Cagliari, Italy
Alessandro Pisano  University of Cagliari, Italy
Andrea Acquaviva  University of Urbino, Urbino, Italy
Luca Benini  University of Bologna, Bologna, Italy
Publisher
ACM  New York, NY, USA
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ABSTRACT

In this work, we describe a control theoretic approach to dynamic voltage/frequency scaling (DVFS) in a pipelined MPSoC architecture with soft real-time constraints, aimed at minimizing energy consumption with throughput guarantees. Theoretical analysis and experiments carried out on a cycle-accurate, energy-aware, and multiprocessor simulation platform are provided. We give a dynamic model of the system behavior which allows to synthesize linear and nonlinear feedback control schemes for the run-time adjustment of the core frequencies. We study the characteristics of the proposed techniques in both transient and steady-state conditions. Finally, we compare the proposed feedback approaches and local DVFS policies from an energy consumption viewpoint.


REFERENCES

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Collaborative Colleagues:
Salvatore Carta: colleagues
Andrea Alimonda: colleagues
Alessandro Pisano: colleagues
Andrea Acquaviva: colleagues
Luca Benini: colleagues