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STMBench7: a benchmark for software transactional memory
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Source European Conference on Computer Systems archive
Proceedings of the 2nd ACM SIGOPS/EuroSys European Conference on Computer Systems 2007 table of contents
Lisbon, Portugal
SESSION: New ideas & new benchmarks table of contents
Pages: 315 - 324  
Year of Publication: 2007
ISBN ~ ISSN:0163-5980 , 978-1-59593-636-3
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Authors
Rachid Guerraoui  School of Computer and Communication Sciences
Michal Kapalka  School of Computer and Communication Sciences
Jan Vitek  Purdue University
Sponsor
SIGOPS: ACM Special Interest Group on Operating Systems
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 8,   Downloads (12 Months): 53,   Citation Count: 13
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ABSTRACT

Software transactional memory (STM) is a promising technique for controlling concurrency in modern multi-processor architectures. STM aims to be more scalable than explicit coarse-grained locking and easier to use than fine-grained locking. However, STM implementations have yet to demonstrate that their runtime overheads are acceptable. To date, empiric evaluations of these implementations have suffered from the lack of realistic benchmarks. Measuring performance of an STM in an overly simplified setting can be at best uninformative and at worst misleading as it may steer researchers to try to optimize irrelevant aspects of their implementations.

This paper presents STMBench7: a candidate benchmark for evaluating STM implementations. The underlying data structure consists of a set of graphs and indexes intended to be suggestive of many complex applications, e.g., CAD/CAM. A collection of operations is supported to model a wide range of workloads and concurrency patterns. Companion locking strategies serve as a baseline for STM performance comparisons. STMBench7 strives for simplicity. Users may choose a workload, number of threads, benchmark length, as well as the possibility of structure modification and the nature of traversals of shared data structures. We illustrate the use of STMBench7 with an evaluation of a well-known software transactional memory implementation.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
The OO7 benchmark. ftp://ftp.cs.wisc.edu/oo7.
 
2
RSTM---the Rochester software transactional memory runtime. http://www.cs.rochester.edu/research/synchronization/rstm.
 
3
STMBench7 home page. http://lpd.epfl.ch/kapalka/stmbench7.php.
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5
D. Dice, O. Shalev, and N. Shavit. Transactional locking II. In Proceedings of the 20th International Symposium on Distributed Computing (DISC'06), 2006.
 
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M. Herlihy. SXM software transactional memory package for C#. http://www.cs.brown.edu/~mph.
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V. J. Maranthe, W. N. Scherer III, and M. L. Scott. Adaptive software transactional memory. In Proceedings of the 19th International Symposium on Distributed Computing (DISC'05), pages 354--368, 2005.
 
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V. J. Marathe, M. F. Spear, C. Heriot, A. Acharya, D. Eisenstat, W. N. Scherer III, and M. L. Scott. Lowering the overhead of software transactional memory. In Proceedings of the 1st ACM SIGPLAN Workshop on Languages, Compilers, and Hardware Support for Transactional Computing (Transact '06), 2006.
 
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T. Riegel, P. Felber, and C. Fetzer. A lazy snapshot algorithm with eager validation. In Proceedings of the 20th International Symposium on Distributed Computing (DISC'06), 2006.
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M. F. Spear, V. J. Marathe, W. N. Scherer III, and M. L. Scott. Conflict detection and validation strategies for software transactional memory. In Proceedings of the 20th International Symposium on Distributed Computing (DISC'06), 2006.

CITED BY  13

Collaborative Colleagues:
Rachid Guerraoui: colleagues
Michal Kapalka: colleagues
Jan Vitek: colleagues