| A sparse grid based spectral stochastic collocation method for variations-aware capacitance extraction of interconnects under nanometer process technology |
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Design, Automation, and Test in Europe
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Proceedings of the conference on Design, automation and test in Europe
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Nice, France
SESSION: Order reduction and variation-aware interconnect modelling
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Pages: 1514 - 1519
Year of Publication: 2007
ISBN:978-3-9810801-2-4
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Authors
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Hengliang Zhu
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Fudan University, Shanghai, P.R. China
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Xuan Zeng
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Fudan University, Shanghai, P.R. China
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Wei Cai
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University of North Carolina at Charlotte
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Jintao Xue
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Fudan University, Shanghai, P.R. China
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Dian Zhou
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Fudan University, Shanghai, P.R. China and The University of Texas at Dallas
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EDA Consortium
San Jose, CA, USA
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Downloads (6 Weeks): 9, Downloads (12 Months): 40, Citation Count: 3
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ABSTRACT
In this paper, a Spectral Stochastic Collocation Method (SSCM) is proposed for the capacitance extraction of interconnects with stochastic geometric variations for nanometer process technology. The proposed SSCM has several advantages over the existing methods. Firstly, compared with the PFA (Principal Factor Analysis) modeling of geometric variations, the K-L (Karhunen-Loeve) expansion involved in SSCM can be independent of the discretization of conductors, thus significantly reduces the computation cost. Secondly, compared with the perturbation method, the stochastic spectral method based on Homogeneous Chaos expansion has optimal (exponential) convergence rate, which makes SSCM applicable to most geometric variation cases. Furthermore, Sparse Grid combined with a MST (Minimum Spanning Tree) representation is proposed to reduce the number of sampling points and the computation time for capacitance extraction at each sampling point. Numerical experiments have demonstrated that SSCM can achieve higher accuracy and faster convergence rate compared with the perturbation method.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 3
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Jian Cui , Gengsheng Chen , Ruijing Shen , Sheldon Tan , Wenjian Yu , Jiarong Tong, Variational capacitance modeling using orthogonal polynomial method, Proceedings of the 18th ACM Great Lakes symposium on VLSI, May 04-06, 2008, Orlando, Florida, USA
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Wangyang Zhang , Wenjian Yu , Zeyi Wang , Zhiping Yu , Rong Jiang , Jinjun Xiong, An efficient method for chip-level statistical capacitance extraction considering process variations with spatial correlation, Proceedings of the conference on Design, automation and test in Europe, March 10-14, 2008, Munich, Germany
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