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Interactive presentation: An FPGA based all-digital transmitter with radio frequency output for software defined radio
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Source Design, Automation, and Test in Europe archive
Proceedings of the conference on Design, automation and test in Europe table of contents
Nice, France
SESSION: Design records table of contents
Pages: 21 - 26  
Year of Publication: 2007
ISBN:978-3-9810801-2-4
Authors
Zhuan Ye  Wireless Solutions Research Center, Schaumburg, IL and Northwestern University, Evanston, IL
John Grosspietsch  Wireless Solutions Research Center, Schaumburg, IL and Wireless Solutions Research Center, Schaumburg, IL
Gokhan Memik  Northwestern University, Evanston, IL
Sponsors
: IEEE Council on Electronic Design Automation (CEDA)
SIGDA: ACM Special Interest Group on Design Automation
: The EDA Consortium
EDAA : European Design and Automation Association
RAS : RAS
: The IEEE Computer Society TTTC
: ECSI
Publisher
EDA Consortium  San Jose, CA, USA
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ABSTRACT

In this paper, we present the architecture and implementation of an all-digital transmitter with radio frequency output targeting an FPGA device. FPGA devices have been widely adopted in the applications of digital signal processing (DSP) and digital communication. They are typically well suited for the evolving technology of software defined radios (SDR) due to their reconfigurability and programmability. However, FPGA devices are mostly used to implement digital baseband and intermediate frequency (IF) functionalities. Therefore, significant analog and RF components are still needed to fulfill the radio communication requirements. The all-digital transmitter presented in this paper directly synthesizes RF signal in the digital domain, therefore eliminates the need for most of the analog and RF components. The all-digital transmitter consists of one QAM modulator and one RF pulse width modulator (RFPWM). The binary output waveform from RFPWM is centered at 800MHz with 64QAM signaling format. The entire transmitter is implemented using Xilinx Virtex2pro device with on chip multi-gigabit transceiver (MGT). The adjacent channel leakage ratio (ACLR) measured in the 20 MHz passband is 45dB, and the measured error vector magnitude (EVM) is less than 1%. Our work extends the digital implementation of communication applications on an FPGA platform to radio frequency, therefore making a significant evolution towards an ideal SDR.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
Zhuan Ye: colleagues
John Grosspietsch: colleagues
Gokhan Memik: colleagues