| Programming costs of explicit memory localization on a large scale shared memory multiprocessor |
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Conference on High Performance Networking and Computing
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Proceedings of the 1991 ACM/IEEE conference on Supercomputing
table of contents
Albuquerque, New Mexico, United States
Pages: 36 - 45
Year of Publication: 1991
ISBN:0-89791-459-7
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Authors
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Silvio Picano
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School of Electrical Engineering, Purdue University, West Lafayette, IN
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Eugene D. Brooks, III
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Massively Parallel Computing Initiative, Lawrence Livermore National Laboratory, Livermore, CA
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Joseph E. Hoag
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Massively Parallel Computing Initiative, Lawrence Livermore National Laboratory, Livermore, CA
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REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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S. Picano, T.L. Casavant, An Experimental Analysis of Image Correlation on Shared vs. Non-Shared Memory MIMD Parallel Computers, Proc. of the 1990 International Conf. on Parallel Processing, pp. 92-96.
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E.D. Brooks III, Joseph E. Hoag, A Scalable Coherent Cache System With Incomplete Directory Slate, Proc. of the 1990 International Conf. on Parallel Processing, pp. 553-554.
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C. Warner, D.G. Meyer, Directory Based Cache Coherence Protocols for Shared Memory Multiprocessors, Purdue University Tech. Rep. TR-EE 90-33, West Lafayette, IN, May 1990.
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E.D. Brooks III, The Indirect K-ary N-cube for a Vector Processing Environment, Parallel Computing, Vol. 6, 1988, pp. 339-348.
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MC88100 RISC Microprocessor User's Manual, 2nd edition, Prentice Hall, Englewood Cliffs, NJ, 1990.
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MC88200 Cache/Memory Management Unit User's Manual, 2nd edition, Prentice Hall, Englewood Cliffs, N J, 1990.
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W.C. Brantley, K.P. McAuliffe, J. Weiss, RP3 Processor-Memory Element, Proc. of the 1985 International Conf. on Parallel Processing, pp. 782- 789.
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G.F. Pfister, V.A. Norton, "Hot Spot" Contention and Combining in Multistage Inlerconnection Networks, Proe. of the 1985 International Conf. on Parallel Processing, pp. 790-797.
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A.Gupta, W.D. Weber, T. Mowry, Reducing Memory and Traffic Requirements for Scalable Directory-Based Cache Coherence Schemes, Proc. of the 1990 International Conf. on Parallel Processing, pp. 312-321.
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P1596 Working Group, P1596/Part IIIA- SC1 Cache Coherence Overview, Tech. Rep. Rev. 0.33, IEEE Computer Society, Nov 1989.
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R.L. Lee, P.C. Yew, D.H. Lawrie, Data Prefetching in Shared Memory Multiprocessors, Proc. of the 1987 International Conf. on Parallel Processing, pp. 28-31.
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E.D. Brooks III, K.H. Warren, ed., The 1991 MPCI Yearly Report: The Attack of the Killer Micros, Lawrence Livermore National Laboratory Tech. Rep. UCP~L-ID-107022, Livermore, CA, March 1991.
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