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ABSTRACT
Simulation environments are an indispensable tool in the design, prototyping, performance evaluation, and analysis of computer systems. Simulator must beable to faithfully reflect the behavior of the system being analyzed. To ensure the accuracy of the simulator, it must be verified and determined to closely match empirical data. Modern processors provide enough performance counters to validate the majority of the performance models; nevertheless, the information provided is not enough to validate power and thermal models. In order to address some of the difficulties associated with the validation of power andthermal models, this paper proposes an infrared measurement setup to capture run-time power consumption and thermal characteristics of modern chips. We use infrared cameras with high spatial resolution (10x10μm) and high frame rate (125fps) to capture thermal maps. To generate a detailed power breakdown (leakage and dynamic) for each processor floorplan unit, we employ genetic algorithms. The genetic algorithm finds a power equation for each floorplan block that produces the measured temperature for a given thermal package. The difference between the predicted power and the externally measured power consumption for an AMD Athlon analyzed in this paper has less than 1% discrepancy. As an example of applicability, we compare the obtained measurements with CACTI power models, and propose extensions to existing thermal models to increase accuracy.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 5
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Francisco J. Mesa-Martinez , Michael Brown , Joseph Nayfach-Battilana , Jose Renau, Measuring performance, power, and temperature from real processors, Proceedings of the 2007 workshop on Experimental computer science, p.16-es, June 13-14, 2007, San Diego, California
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Francisco J. Mesa-Martinez , Michael Brown , Joseph Nayfach-Battilana , Jose Renau, Measuring performance, power, and temperature from real processors, Proceedings of the 2007 workshop on Experimental computer science, p.16-es, June 13-14, 2007, San Diego, California
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Francisco J. Mesa-Martinez , Michael Brown , Joseph Nayfach-Battilana , Jose Renau, Measuring performance, power, and temperature from real processors, Experimental computer science on Experimental computer science, p.17-17, June 13-14, 2007, San Diego
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Ke Meng , Russ Joseph , Robert P. Dick , Li Shang, Multi-optimization power management for chip multiprocessors, Proceedings of the 17th international conference on Parallel architectures and compilation techniques, October 25-29, 2008, Toronto, Ontario, Canada
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