ACM Home Page
Please provide us with feedback. Feedback
Power model validation through thermal measurements
Full text PdfPdf (764 KB)
Source
International Symposium on Computer Architecture archive
Proceedings of the 34th annual international symposium on Computer architecture table of contents
San Diego, California, USA
SESSION: Power and thermal table of contents
Pages: 302 - 311  
Year of Publication: 2007
ISBN:978-1-59593-706-3
Also published in ...
Authors
Francisco Javier Mesa-Martinez  UC Santa Cruz, Santa Cruz, CA
Joseph Nayfach-Battilana  UC Santa Cruz, Santa Cruz, CA
Jose Renau  UC Santa Cruz, Santa Cruz, CA
Sponsors
SIGARCH: ACM Special Interest Group on Computer Architecture
IEEE-CS : Computer Society
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 12,   Downloads (12 Months): 138,   Citation Count: 5
Additional Information:

abstract   references   cited by   index terms   collaborative colleagues  

Tools and Actions: Review this Article  
DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/1250662.1250700
What is a DOI?

ABSTRACT

Simulation environments are an indispensable tool in the design, prototyping, performance evaluation, and analysis of computer systems. Simulator must beable to faithfully reflect the behavior of the system being analyzed. To ensure the accuracy of the simulator, it must be verified and determined to closely match empirical data. Modern processors provide enough performance counters to validate the majority of the performance models; nevertheless, the information provided is not enough to validate power and thermal models.

In order to address some of the difficulties associated with the validation of power andthermal models, this paper proposes an infrared measurement setup to capture run-time power consumption and thermal characteristics of modern chips. We use infrared cameras with high spatial resolution (10x10μm) and high frame rate (125fps) to capture thermal maps. To generate a detailed power breakdown (leakage and dynamic) for each processor floorplan unit, we employ genetic algorithms. The genetic algorithm finds a power equation for each floorplan block that produces the measured temperature for a given thermal package. The difference between the predicted power and the externally measured power consumption for an AMD Athlon analyzed in this paper has less than 1% discrepancy. As an example of applicability, we compare the obtained measurements with CACTI power models, and propose extensions to existing thermal models to increase accuracy.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

1
 
2
 
3
Y.K. Cheng, P. Raha, C.C. Teng, E. Rosenbaum, and S.M. Kang. ILLIADS-T: An Electrothermal Timing Simulator for Temperature-Sensitive Reliability Diagnosis of CMOS VLSI Chips. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 17(8):1434--1445, Aug 1998.
 
4
S.-W. Chung and K. Skadron. Using On-Chip Event Counters For High-Resolution, Real-Time Temperature Measurement. In Thermal and Thermomechanical Phenomena in Electronics Systems, 2006, pages 114--120. IEEE Computer Society, May 2006.
 
5
 
6
H.F. Hamann, J. Lacey, A. Weger, and J. Wakil. Spatially-resolved imaging of microprocessor power (SIMP): hotspots in microprocessors. In Thermal and Thermomechanical Phenomena in Electronics Systems, 2006, pages 121--125. IEEE Computer Society, May 2006.
 
7
 
8
M.N. Ozisik. Inverse Heat Transfer. Taylor and Francis, 2000.
 
9
M. Raudensky, K.A. Woodbury, J. Kral, and T. Brezina. Genetic Algorithm in Solution of Inverse Heat Conduction Problems. pages 293--306, 1995.
10
 
11
S. Wilton and N. Jouppi. CACTI: An Enhanced Cache Access and Cycle Time Model. IEEE Journal on Solid-State Circuits, 31(5):677--688, May 1996.
12
 
13
Y. Zhang, D. Parikh, K. Sankaranarayanan, K. Skadron, and M. Stan. Hotleakage: A temperature-aware model of subthreshold and gate leakage for architects. Technical Report CS-2003-05, Univ. of Virginia Dept. of Computer Science, March 2003.


Collaborative Colleagues:
Francisco Javier Mesa-Martinez: colleagues
Joseph Nayfach-Battilana: colleagues
Jose Renau: colleagues