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Automated generation of layout and control for quantum circuits
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Conference On Computing Frontiers archive
Proceedings of the 4th international conference on Computing frontiers table of contents
Ischia, Italy
SESSION: Quantum computing table of contents
Pages: 83 - 94  
Year of Publication: 2007
ISBN:978-1-59593-683-7
Authors
Mark Whitney  University of California, Berkeley, Berkeley, CA
Nemanja Isailovic  University of California, Berkeley, Berkeley, CA
Yatish Patel  University of California, Berkeley, Berkeley, CA
John Kubiatowicz  University of California, Berkeley, Berkeley, CA
Sponsors
ACM: Association for Computing Machinery
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
Publisher
ACM  New York, NY, USA
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ABSTRACT

We present a computer-aided design flow for quantum circuits, complete with automatic layout and control logic extraction. To motivate automated layout for quantum circuits, we investigate grid-based layouts and show a performance variance of four times as we vary grid structure and initial qubit placement. We then propose two polynomial-time design heuristics: a greedy algorithm suitable for small, congestion-free quantum circuits and a dataflow-based analysis approach to placement and routing with implicit initial placement of qubits. Finally, we show that our dataflow-based heuristic generates better layouts than the state-of-the-art automated grid-based layout and scheduling mechanism in terms of latency and potential pipelinability, but at the cost of some area.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
Mark Whitney: colleagues
Nemanja Isailovic: colleagues
Yatish Patel: colleagues
John Kubiatowicz: colleagues