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Performance counters and development of SPEC CPU2006
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ACM SIGARCH Computer Architecture News archive
Volume 35 ,  Issue 1  (March 2007) table of contents
SPECIAL ISSUE: SPEC CPU2006 analysis table of contents
Pages: 118 - 121  
Year of Publication: 2007
ISSN:0163-5964
Author
John L. Henning  Sun Microsystems
Publisher
ACM  New York, NY, USA
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ABSTRACT

Performance counters provide the means to track detailed events that occur on a CPU chip. These events are of interest to both performance analysts and compiler developers. Counting them provides essential clues to guide performance improvement. For example, a tester who sees that a program has a high cache miss rate on a particular system may experiment with compilation options that improve prefetching. A compiler developer who sees the same thing may realize that the code generator's machine model is missing some crucial detail of behavior on that particular system.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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See the two result submissions for the Sun Blade 2000 at www.spec.org/cpu2006/results/res2006q3
 
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The manpage for cputrack is available under User Commands at http://docs.sun.com/app/docs/coll/40.10
 
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UltraSPARC III Cu User's Manual, Version 2.2.1, January 2004, Chapter 14.
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