| Layer minimization of escape routing in area array packaging |
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International Conference on Computer Aided Design
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Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
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San Jose, California
SESSION: Novel interconnect methodologies
table of contents
Pages: 815 - 819
Year of Publication: 2006
ISBN ~ ISSN:1092-3152 , 1-59593-389-1
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Authors
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Renshen Wang
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University of California, San Diego La Jolla, CA
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Rui Shi
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University of California, San Diego La Jolla, CA
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Chung-Kuan Cheng
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University of California, San Diego La Jolla, CA
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Downloads (6 Weeks): 4, Downloads (12 Months): 19, Citation Count: 1
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ABSTRACT
We devise a central triangular sequence to minimize the escape routing layers in area array packaging. We use a network flow model to analyze the bottleneck of the routable pins. The triangular patterns are generated in a reverse order from the last to the first layer. We demonstrate that the triangular pin sequence maximizes the sum of escape pins in the accumulated layers and thus minimize the number of escape routing layers. A test case is presented to illustrate the approach.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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H. Bakoglu, "Circuits, Interconnections and Packaging in VLSI, Addison-Wesley, 1990.
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E. Winkler, "Escape Routing from Chip Scale Packages," IEEE/CPMT Int. Electronics Manufacturing Technology Symp., pp. 393--401, 1996.
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N. M. Gasparini, "A Method of Designing a Group of Bumps for C4 Packages to Maximize the Number of Bumps and Minimize the Number of Package Layers," Electronic Components and Technology Conference, pp. 695--696, 1994.
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M. Horiuchi, E. Yoda, Y. Takeuchi, "Escape Routing Design to Reduce the Number of Layers in Area Array Packaging," IEEE Trans. on Advanced Packaging, vol.23, no.4, pp. 686--691, Nov. 2000.
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Wun-Tat Chan , Francis Y. L. Chin , Hing-Fung Ting, Escaping a grid by edge-disjoint paths, Proceedings of the eleventh annual ACM-SIAM symposium on Discrete algorithms, p.726-734, January 09-11, 2000, San Francisco, California, United States
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R. Shi, H. Chen, C.-K. Cheng, D. Beckman, D. Huang, "Layer Count Reduction for Area Array Escape Routing," Int. Conf. & Exhibition on Device Packaging, Scottsdale, 2005
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