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Dynamic voltage and frequency management based on variable update intervals for frequency setting
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Source International Conference on Computer Aided Design archive
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design table of contents
San Jose, California
SESSION: Dynamic power management table of contents
Pages: 755 - 760  
Year of Publication: 2006
ISBN ~ ISSN:1092-3152 , 1-59593-389-1
Authors
M. Najibi  Amirkabir University of Technology, Tehran
M. Salehi  University of Tehran
A. Afzali Kusha  University of Tehran
M. Pedram  University of Southern California, Los Angeles
S. M. Fakhraie  University of Tehran
H. Pedram  Amirkabir University of Technology, Tehran
Sponsors
IEEE-CS : Computer Society
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
Bibliometrics
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ABSTRACT

An efficient adaptive method to perform dynamic voltage and frequency management (DVFM) for minimizing the energy consumption of microprocessor chips is presented. Instead of using a fixed update interval, the proposed DVFM system makes use of adaptive update intervals for optimal frequency and voltage scheduling. The optimization enables the system to rapidly track the workload changes so as to meet soft real-time deadlines. The method, which is based on introducing the concept of an effective deadline, utilizes the correlation between consecutive values of the workload. In practice because the frequency and voltage update rates are dynamically set based on variable update interval lengths, voltage fluctuations on the power network are also minimized. The technique, which may be implemented by simple hardware and is completely transparent from the application, leads to power savings of up to 60% for highly correlated workloads compared to DVFM systems based on fixed update intervals.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
B. C. Mochocki, X. S. Hu, and G. Quan, "A Unified approach to variable voltage scheduling for nonideal DVS processors," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 23, no. 9, Sept. 2004, pp. 1370--1377.
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T. Burd, T. Pering, et al., "A Dynamic voltage scaled microprocessor system," IEEE Journal of Solid-State Circuits, vol. 35, no. 11, Feb. 2000, pp.294--295.
 
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K. Nowka, G. D. Carpenter, et al., "A 0.9 V to 1.95 V dynamic voltage-scalable and frequency-scalable 32-bit PowerPC processor," in IEEE Int. Solid-State Circuits Conf. Feb. 2002, pp. 340--341.
 
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K. J. Nowka, G. D. Carpenter, et al., "A 32-bit PowerPC system-on-a-chip with support for dynamic voltage scaling and dynamic frequency scaling," IEEE Journal of Solid-State Circuits, vol. 37, no. 11, Nov. 2002, pp. 1441--1447.
 
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M. Elgehaly, A. Fahim, et al., "Robust and efficient dynamic voltage scaling architecture," IEEE International System on Chip Conference, Sep 2003, pp. 155--158.
 
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M. Nakai, S. Akui, et al., "Dynamic voltage and frequency management for a low-power embedded microprocessor," IEEE Journal of Solid-State Circuits, vol. 40, no. 1, Jan. 2005, pp 28--35.

Collaborative Colleagues:
M. Najibi: colleagues
M. Salehi: colleagues
A. Afzali Kusha: colleagues
M. Pedram: colleagues
S. M. Fakhraie: colleagues
H. Pedram: colleagues