Post-placement voltage island generation

ABSTRACT

High power consumption will shorten battery life for handheld devices and cause thermal and reliability problems. One way to lower the dynamic power consumption is to reduce the supply voltage. Multi-supply voltage (MSV) is introduced to provide higher flexibility in controlling the power and performance trade-off In region-based MSV, circuits are partitioned into "voltage islands" where each island occupies a contiguous physical space and operates at one supply voltage. In a very recent work [6], this supply voltage partitioning problem is addressed, and the input circuit is partitioned into a slicing structure with every voltage island rectangular in shape. This unnecessary restriction on the structure and island shapes has caused a significant degradation in the solution quality. In this paper, we propose a method to solove this voltage island generation problem without these restrictions. Experimental results have shown that our approach is fast and can improve the solution quality significantly. In some data sets, only two voltage islands are needed to satisfy the same power consumption bound while the approach in [6] will generate nineteen.

REFERENCES

• 1: Power Islands: The Evolving Topology of SoC Power Management. http://www.us.design-reuse.com/articles/article9150.html.
• 2: J. Buurma and L. Cooke. Low-power Design using Multiple V<inf>T</inf>H ASIC Libraries. http://www.sinavigator.com/Low_Power_Design.pdf.
• 3: Jingcao Hu , Youngsoo Shin , Nagu Dhanwada , Radu Marculescu, Architecting voltage islands in core-based system-on-a-chip designs, Proceedings of the 2004 international symposium on Low power electronics and design, August 09-11, 2004, Newport Beach, California, USA [doi>10.1145/1013235.1013283]
• 4: David E. Lackey , Paul S. Zuchowski , Thomas R. Bednar , Douglas W. Stout , Scott W. Gould , John M. Cohn, Managing power and performance for System-on-Chip designs using Voltage Islands, Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design, p.195-202, November 10-14, 2002, San Jose, California [doi>10.1145/774572.774601]
• 5: S. Muthukrishnan , Torsten Suel, Approximation algorithms for array partitioning problems, Journal of Algorithms, v.54 n.1, p.85-104, January 2005 [doi>10.1016/j.jalgor.2003.11.006]
• 6: Huaizhi Wu , I-Min Liu , M. D. F. Wong , Yusu Wang, Post-placement voltage island generation under performance requirement, Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design, p.309-316, November 06-10, 2005, San Jose, CA

INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.2 Design Aids
          Subjects: Placement and routing

Additional Classification:
  J. Computer Applications
  J.6 COMPUTER-AIDED ENGINEERING
      Subjects: Computer-aided design (CAD)

General Terms:
Algorithms, Design

Keywords:
floorplanning, tree, voltage island