| Cache miss clustering for banked memory systems |
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International Conference on Computer Aided Design
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Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
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San Jose, California
SESSION: Power and performance optimizations on system level design
table of contents
Pages: 244 - 250
Year of Publication: 2006
ISBN ~ ISSN:1092-3152 , 1-59593-389-1
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Authors
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O. Ozturk
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Pennsylvania State University, University Park, PA
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G. Chen
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Pennsylvania State University, University Park, PA
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M. Kandemir
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Pennsylvania State University, University Park, PA
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M. Karakoy
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Imperial College, London, UK
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Downloads (6 Weeks): 7, Downloads (12 Months): 33, Citation Count: 1
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ABSTRACT
One of the previously-proposed techniques for reducing memory energy consumption is memory banking. The idea is to divide the memory space into multiple banks and place currently unused (idle) banks into a low-power operating mode. The prior studies -- both hardware and software domain - in memory energy optimization via low-power modes do not take the data cache behavior explicitly into account. As a consequence, the energy savings achieved by these techniques can be unpredictable due to dynamic cache behavior at runtime. The main contribution of this paper is a compiler optimization, called the bank-aware cache miss clustering, that increases idle durations of memory banks, and as a result, enables better exploitation of available low-power capabilities supported by the memory system. This is because clustering cache misses helps to cluster cache hits as well, and this in turn increases bank idleness. We implemented our cache miss clustering approach within a compilation framework and tested it using seven array-intensive application codes. Our experiments show that cache miss clustering saves significant memory energy as a result of increased idle periods of memory banks.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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V. Delaluz , M. Kandemir , N. Vijaykrishnan , M. J. Irwin, Energy-oriented compiler optimizations for partitioned memory architectures, Proceedings of the 2000 international conference on Compilers, architecture, and synthesis for embedded systems, p.138-147, November 17-19, 2000, San Jose, California, United States
[doi> 10.1145/354880.354900]
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3
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4
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5
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Keith I. Farkas , Jason Flinn , Godmar Back , Dirk Grunwald , Jennifer M. Anderson, Quantifying the energy consumption of a pocket computer and a Java virtual machine, Proceedings of the 2000 ACM SIGMETRICS international conference on Measurement and modeling of computer systems, p.252-263, June 18-21, 2000, Santa Clara, California, United States
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6
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Mary W. Hall , Jennifer M. Anderson , Saman P. Amarasinghe , Brian R. Murphy , Shih-Wei Liao , Edouard Bugnion , Monica S. Lam, Maximizing Multiprocessor Performance with the SUIF Compiler, Computer, v.29 n.12, p.84-89, December 1996
[doi> 10.1109/2.546613]
|
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7
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Alvin R. Lebeck , Xiaobo Fan , Heng Zeng , Carla Ellis, Power aware page allocation, Proceedings of the ninth international conference on Architectural support for programming languages and operating systems, p.105-116, November 2000, Cambridge, Massachusetts, United States
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8
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9
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|
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10
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|
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11
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|
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12
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|
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13
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128/144-MBit Direct RDRAM Data Sheet, Rambus Inc., 1999.
|
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14
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Rambus Inc. http://www.rambus.com/.
|
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15
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Mazen A. R. Saghir , Paul Chow , Corinna G. Lee, Exploiting dual data-memory banks in digital signal processors, Proceedings of the seventh international conference on Architectural support for programming languages and operating systems, p.234-243, October 01-04, 1996, Cambridge, Massachusetts, United States
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16
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G. Chen , M. Kandemir , H. Saputra , M. J. Irwin, Exploiting bank locality in multi-bank memories, Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems, October 30-November 01, 2003, San Jose, California, USA
[doi> 10.1145/951710.951748]
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17
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SimpleScalar LLC. http://www.simplescalar.com/
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18
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|
 |
19
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N. Vijaykrishnan , M. Kandemir , M. J. Irwin , H. S. Kim , W. Ye, Energy-driven integrated hardware-software optimizations using SimplePower, Proceedings of the 27th annual international symposium on Computer architecture, p.95-106, June 2000, Vancouver, British Columbia, Canada
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