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From single core to multi-core: preparing for a new exponential
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Source International Conference on Computer Aided Design archive
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design table of contents
San Jose, California
SESSION: Embedded tutorial: from dual to multi to many core --- opportunities and challenges for supporting the new exponential table of contents
Pages: 67 - 72  
Year of Publication: 2006
ISBN ~ ISSN:1092-3152 , 1-59593-389-1
Authors
Jeff Parkhurst  Intel Corporation Folsom, CA
John Darringer  IBM T J Watson Research Center, Yorktown Heights, NY
Bill Grundmann  Intel Corporation, Hillsboro, OR
Sponsors
IEEE-CS : Computer Society
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 29,   Downloads (12 Months): 151,   Citation Count: 4
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ABSTRACT

In the past, processor design trends were dominated by increasingly complex feature sets, higher clock speeds, growing thermal envelopes and increasing power dissipation. Recently, clock speeds have tapered and thermal and power dissipation envelopes have remained flat. However, the demand for increasing performance continues which has fueled the move to integrated multiple processor (multi-core) designs. This paper discusses this trend towards multi-core processor designs, the design challenges that accompany it and a view of the research required to support it.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Gordon E. Moore, Cramming More Components onto Integrated Circuits. Electronics, April 19, 1965.
 
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Pham, D. et al. The Design and Implementation of a First-Generation CELL Processor. In ISSCC Digest of Technical Papers. (San Francisco, CA, USA, Feb 6-10, 2005) p. 184--5
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Collaborative Colleagues:
Jeff Parkhurst: colleagues
John Darringer: colleagues
Bill Grundmann: colleagues