State re-encoding for peak current minimization

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State re-encoding for peak current minimization

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International Conference on Computer Aided Design archive
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design table of contents

San Jose, California

SESSION: Post-placement optimization techniques table of contents

Pages: 33 - 38

Year of Publication: 2006

ISBN ~ ISSN:1092-3152 , 1-59593-389-1

Authors

Shih-Hsu Huang	Chung Yuan Christian University, Chung Li, Taiwan, R.O.C.
Chia-Ming Chang	Chung Yuan Christian University, Chung Li, Taiwan, R.O.C.
Yow-Tyng Nieh	SOC Technology Center, Industrial Technology Research Institute, Hsin Chu, Taiwan, R.O.C.

Sponsors

IEEE-CS : Computer Society
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation

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ACM New York, NY, USA

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Downloads (6 Weeks): 3, Downloads (12 Months): 17, Citation Count: 1

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ABSTRACT

In a synchronous finite state machine (FSM), huge current peaks are often observed at the moment of state transition. Previous low power state encoding algorithms focus on the reduction of switching activities of state registers (i.e., state bits). However, even though the switching state registers are the same, different combinations of switching directions still result in different peak currents. Based on that observation, in this paper, we propose the first approach to re-encode an FSM by considering the switching directions of state registers in order to minimize the peak current caused by the state transition. Experimental data consistently show that the peak current is reduced with no penalty.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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