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Efficient obstacle-avoiding rectilinear steiner tree construction
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International Symposium on Physical Design archive
Proceedings of the 2007 international symposium on Physical design table of contents
Austin, Texas, USA
SESSION: Routing table of contents
Pages: 127 - 134  
Year of Publication: 2007
ISBN:978-1-59593-613-4
Authors
Chung-Wei Lin  National Taiwan University, Taipei, Taiwan Roc
Szu-Yu Chen  National Taiwan University, Taipei, Taiwan Roc
Chi-Feng Li  National Taiwan University, Taipei, Taiwan Roc
Yao-Wen Chang  National Taiwan University, Taipei, Taiwan Roc
Chia-Lin Yang  National Taiwan University, Taipei, Taiwan Roc
Sponsors
ACM: Association for Computing Machinery
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 14,   Downloads (12 Months): 79,   Citation Count: 12
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ABSTRACT

Given a set of pins and a set of obstacles on a plane, an obstacle-avoiding rectilinear Steiner minimal tree (OARSMT) connects these pins, possibly through some additional points (called Steiner points), and avoids running through any obstacle to construct a tree with a minimal total wirelength. The OARSMT problem becomes more important than ever for modern nanometer IC designs which need to consider numerous routing obstacles incurred from power networks, prerouted nets, IP blocks, feature patterns for manufacturability improvement, antenna jumpers for reliability enhancement, etc. Consequently, the OARSMT problem has received dramatically increasing attention recently. Nevertheless, considering obstacles significantly increases the problem complexity, and thus most previous works suffer from either poor quality or expensive running time. Based on the obstacle-avoiding spanning graph (OASG), this paper presents an efficient algorithm with some theoretical optimality guarantees for the OARSMT construction. Unlike previous heuristics, our algorithm guarantees to find an optimal OARSMT for any 2-pin net and many higher-pin nets. Extensive experiments show that our algorithm results in significantly shorter wirelengths than all state-of-the-art works.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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Y. Yang, Q. Zhu, T. Jing, X. Hong, and Y. Wang, "Rectilinear Steiner minimal tree among obstacles," Proc. ASIC, pp. 348--351, 2003.
 
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H. Zhou, "Efficient Steiner tree construction based on spanning graphs," IEEE Trans. Computer-Aided Design, Vol. 23, No. 5, pp. 704--710, May 2004.

CITED BY  12

Collaborative Colleagues:
Chung-Wei Lin: colleagues
Szu-Yu Chen: colleagues
Chi-Feng Li: colleagues
Yao-Wen Chang: colleagues
Chia-Lin Yang: colleagues