A variable observation time method for testing delay faults

ABSTRACT

Test methodologies for delay faults usually observe output patterns at a single observation time, and the same observation time is used for all faults in the circuit under test. In this paper we show that use of a single observation time is not advantageous for testing delay faults, and we are able to show that the detection threshold can be dramatically improved by using a testing methodology that allows variable, fault-dependent and output-dependent observation times. A “waveform-type” simulation method is used for calculating detection thresholds for definitely detectable faults. Statistical distributions of delay fault detection thresholds are presented for ten benchmark circuits.

REFERENCES

• 1: W.-W. Mao , M.D. Ciletti, A simplified six-waveform type method for delay fault testing, Proceedings of the 26th ACM/IEEE conference on Design automation, p.730-733, June 25-28, 1989, Las Vegas, Nevada, United States [doi>10.1145/74382.74515]
• 2: V.S. Iyengar, B.K. Rosen, and I. Spillinger, "Delay Test Generation 1 -- Concepts and Coverage Metrics," 1988 IEEE ITC, pp.857-866.
• 3: V.S. Iyengar, B.K. Rosen, and I. Spillinger, "Delay Test Generation 2 -- Algebra and Algorithm," 1988 IEEE ITC, pp.867-876.
• 4: G.L. Smith, "Model for Delay Faults Upon Path," 1985 IEEE ITC, pp.342-349.
• 5: J.L. Carter, V.S. Iyengar, and B.K. Rosen, "Efficient Test Coverage Determination for Delay Faults," 1987 IEEE ITC,
• 6: A.K. Pramamick and S.M. RedO),, "On the Detection of Delay Faults," 1988 IEEE ITC, pp.845-856.
• 7: Texas Instrumems,"2 micron CMOS Standard Cell Data Book," 1986.

INDEX TERMS

Primary Classification:
  B. Hardware
  B.6 LOGIC DESIGN
      B.6.1 Design Styles
          Subjects: Combinational logic

Additional Classification:
  B. Hardware
  B.6 LOGIC DESIGN
      B.6.2 Reliability and Testing**

General Terms:
Algorithms, Experimentation, Reliability