The influences of fault type and topology on fault model performance and the implications to test and testable design

ABSTRACT

A new method, Difference Propagation, is proposed to analyze fault models in combinational circuits. It propagates Boolean functional information represented by ordered binary decision diagrams. Results are presented concerning exact detectabilities and syndromes for a set of benchmark circuits. The data suggest answers to open questions in CAD and represent the first data of this type for bridging faults. The information is shown to affect testable design as well as test generation.

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INDEX TERMS

Primary Classification:
  B. Hardware
  B.6 LOGIC DESIGN
      B.6.1 Design Styles
          Subjects: Combinational logic

Additional Classification:
  B. Hardware
  B.6 LOGIC DESIGN
      B.6.2 Reliability and Testing**
          Subjects: Testability**
      B.6.3 Design Aids
          Subjects: Simulation

  J. Computer Applications
  J.6 COMPUTER-AIDED ENGINEERING
      Subjects: Computer-aided design (CAD)

General Terms:
Design, Performance