| Data path tradeoffs using MABAL |
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Annual ACM IEEE Design Automation Conference
archive
Proceedings of the 27th ACM/IEEE Design Automation Conference
table of contents
Orlando, Florida, United States
Pages: 511 - 516
Year of Publication: 1991
ISBN:0-89791-363-9
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Authors
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Kayhan Küçükçakar
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Department of Electrical Engineering Systems, University of Southern California, Los Angeles, CA
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Alice C. Parker
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Department of Electrical Engineering Systems, University of Southern California, Los Angeles, CA
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Downloads (6 Weeks): 5, Downloads (12 Months): 14, Citation Count: 12
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ABSTRACT
This paper describes a set of novel tradeoff experiments using MABAL, a Module And Bus ALlocation program. MABAL uses a simple heuristic algorithm to concurrently perform functional unit allocation, register allocation, interconnect allocation and module binding, while minimising overall cost. MABAL was used to produce over 3000 RTL designs from a specification which had been previously scheduled. Tradeoffs between buses and multiplexers and between data steering logic and functional logic were investigated. The results indicate data path tradeoffs are sensitive to the characteristics of the module library used, and illustrate the difficulty of integrating module generation or logic synthesis with high-level synthesis. This tradeoff study has also highlighted MABAL's capabilities and is unlike any other reported in the literature.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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C. Y. Hitchcock, "Automated Synthesis of Data Paths", Master's Thesis, Department of Electrical Engineering, Carnegie-Mellon University, January 1983.
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R. Jain , K. Kücükcakar , M. J. Mlinar , A. C. Parker, Experience with ADAM synthesis system, Proceedings of the 26th ACM/IEEE conference on Design automation, p.56-61, June 25-28, 1989, Las Vegas, Nevada, United States
[doi> 10.1145/74382.74393]
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David W. Knapp, "Synthesis from Partial Structure", Proc. of IFIP TC-10 Conf, Pisa, September 1988.
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Kayhan Kfi~fik~akar and Alice C. Parker, "MABAL: A software package for Module And Bus ALlocation", Technical Report, Department of EE-Systems, University of Southern California, to appear in International Journal of Computer Aided VLSI Design.
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Kayhan K/i~/ikqakar and Alice C. Parker, "Daga Path Design Tradeoffs using MABAL", Proceedings of High-Level Synthesis Workshop, Maine, 1989.
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D. E. Thomas , E. M. Dirkes , R. A. Walker , J. V. Rajan , J. A. Nestor , R. L. Blackburn, The system architect's workbench, Proceedings of the 25th ACM/IEEE conference on Design automation, p.337-343, June 12-15, 1988, Atlantic City, New Jersey, United States
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Texa~ Instruments, ~2 micrometer CMOS Standard CeLl Data Book", 1986.
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CITED BY 12
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M. Rim , R. Jain , R. De Leone, Optimal allocation and binding in high-level synthesis, Proceedings of the 29th ACM/IEEE conference on Design automation, p.120-123, June 08-12, 1992, Anaheim, California, United States
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B. Gregory , D. MacMillen , D. Fogg, ISIS: a system for performance driven resource sharing, Proceedings of the 29th ACM/IEEE conference on Design automation, p.285-290, June 08-12, 1992, Anaheim, California, United States
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Robert A. Walker , Shivkumar Ramabadran , Rajive Joshi , Steinar Flatland, Increasing user interaction during high-level synthesis, Proceedings of the 24th annual international symposium on Microarchitecture, p.133-142, September 1991, Albuquerque, New Mexico, Puerto Rico
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Ishwar Parulkar , Sandeep K. Gupta , Melvin A. Breuer, Lower bounds on test resources for scheduled data flow graphs, Proceedings of the 33rd annual conference on Design automation, p.143-148, June 03-07, 1996, Las Vegas, Nevada, United States
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