NASFLOW, a simulation tool for silicon technology development

ABSTRACT

A simulation system is described for linking two-dimensional simulators for process and device to a parameter extraction program, for the purpose of generating artificial parameters for the circuit analysis program, NASPICE. A key feature of the system is that it operates under the control of a shell program which offers a simple and easy to use interface to the user. Results of an initial development using the program sequence SUPRA = > PISCES = > CADPET = > NASPICE are described. Good correlation was obtained between system generated drain characteristics and silicon for both N and P-channel MOS transistors, and similarly for CMOS DC transfer characteristics.

REFERENCES

• 1: Andrzej J. Stroiwas, Stephen W. Director, "The Process F.t~gineer's Workbench', IEI'E Journal of Solid- State Circuit,;, Vol. SC-23, No. 2, April |988.
• 2: Steve G. E)uvall, "An Interchange Format for Process and Device Simulation', IEEE Trans. CAD, Vol. CAD-7, No. 7, pp. 741-754, July 1988.
• 3: C.P. Iio, S.E. i lansen, and P.M. Fahey, "SUPREM Ill - A Program for Integrated Circuit Process Modeling and Simulation', Technical Report No. SI!L84-001, Stanford Electronics Laboratories, Stanford University, Stanford, Calif., July 1984.
• 4: D. Olin, M.R. Kump, and R.W. Dutton, "SUPRA: Stanford University Process Analysis Program', Stanford University Laboratories, Stanford University, Stanford, Calif., July 1981.
• 5: M.R. Pinto, C.S. Rafferty, t-|.R. Yeager, and R.W. Dutton, "PISCES I|: Poisson and Continuity Equation Solver', Stanford University Technical Report, Stanford University, Stanford, Calif., Copyright 1984.
• 6: M.R. Pinto, C.S. Rafferty, II.R. Yeager, and R.W. Dutton, "PISCES lib Supplementary Report', Stanford University Technical Report, Stanford University, Stanford, Calif., Copyright 1985.
• 7: S. Selberherr, A. Schutz, I1. Potzl, "MINIMOS - A Two-l)imenslonal Transistor Analyzer", IEEE ED-27, pp. 1 770-1780, (I 980)
• 8: A. Schutz, S. Selberherr, |t. Potzl, "A Numerical Model of the Avalanche Effect in MOS-Transistors", Solid-State Electronics 25, pp. 177-183, (1982)
• 9: W. l lansch, S. Selberherr, "MINIMOS 3: A MOSFET Simulator that Includes Energy Balance", IEEE ED-34, pp. I074-1078, (1987)

INDEX TERMS

Primary Classification:
  J. Computer Applications
  J.6 COMPUTER-AIDED ENGINEERING
      Subjects: Computer-aided design (CAD)

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.2 Design Aids
          Subjects: Simulation

General Terms:
Design, Performance