Timing analysis in precharge/unate networks

ABSTRACT

We consider the false path problem on precharge/unate networks, more commonly known as dynamic CMOS networks. We demonstrate that the tight criterion of dynamic sensitization is robust on such networks, though it has been shown to be non-robust on general networks. Tighter bounds may be obtained on the length of the critical path in precharge/unate networks than in general static networks. We derive a dynamic programming procedure to find the longest dynamically sensitizable path in a precharge/unate network.

REFERENCES

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INDEX TERMS

Primary Classification:
  B. Hardware
  B.6 LOGIC DESIGN
      B.6.1 Design Styles
          Subjects: Combinational logic

Additional Classification:
  F. Theory of Computation
  F.2 ANALYSIS OF ALGORITHMS AND PROBLEM COMPLEXITY

General Terms:
Algorithms, Design, Reliability