NES

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NES: the behavioral model for the formal semantics of a hardware design language UDL/I

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 27th ACM/IEEE Design Automation Conference table of contents

Orlando, Florida, United States

Pages: 8 - 13

Year of Publication: 1991

ISBN:0-89791-363-9

Authors

Nagisa Ishiura	Department of Information Science, Faculty of Engineering, Kyoto University, Kyoto 606, JAPAN
Hiroto Yasuura	Department of Electronics, Faculty of Engineering, Kyoto University, Kyoto 606, JAPAN
Shuzo Yajima	Department of Information Science, Faculty of Engineering, Kyoto University, Kyoto 606, JAPAN

Sponsors

SIGDA: ACM Special Interest Group on Design Automation
IEEE-CS : Computer Society

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ACM New York, NY, USA

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ABSTRACT

This paper describes a new behavioral model of hardware, named NES (Nondeterministic Event Sequence) model, which was developed for the purpose of defining formal semantics of the gate level and the register transfer level hardware description languages. The NES model is a generalization of the event driven simulation, and can be a basis of synthesis and verification as well as simulation. We introduce basic concepts, formal definition, and a description method of the NES model.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	O. Karatsu, VLSI design language standardization effort in Japan, Proceedings of the 26th ACM/IEEE conference on Design automation, p.50-55, June 25-28, 1989, Las Vegas, Nevada, United States [doi>10.1145/74382.74392]
	2	H. Yasuura , N. Ishiura, Semantics of a hardware design language for Japanese standardization, Proceedings of the 26th ACM/IEEE conference on Design automation, p.836-839, June 25-28, 1989, Las Vegas, Nevada, United States [doi>10.1145/74382.74518]
	3	Robert Piloty , D. L. Dietmeyer , Dominique Borrione , Mario R. Barbacci , Frederick J. Hill , Patrick Skelly, CONLAN Report, Springer-Verlag New York, Inc., Secaucus, NJ, 1983
	4	David R. Coelho, The VHDL Handbook, Kluwer Academic Publishers, Norwell, MA, 1989
	5	R. W. Hertenstein, R. Hauck, K. Lemmert and A. Wodtko: KARL-III Manual, report AG Hartenstein, Kaiserslautern University, (1986).
	6	D. Bjcrrter and C. B. Jones: The Vienna Development Method: The Meta Language, Lecture Notes in Computer Science 61, Springer-Verlag, (1978).
	7	J. L. Carter, B. K. Rosen, G. L. Smith aatd V. Pichumani: "Restricted Symbolic Evaluation is Fast and Useful", Proc. ICCAD-89, pp. 38-41, (1989).
	8	Nagisa Ishiura , Yutaka Deguchi , Shuzo Yajima, Coded time-symbolic simulation using shared binary decision diagram, Proceedings of the 27th ACM/IEEE conference on Design automation, p.130-135, June 24-27, 1990, Orlando, Florida, United States [doi>10.1145/123186.123240]