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StateCharts to systemc: a high level hardware simulation approach
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Source Great Lakes Symposium on VLSI archive
Proceedings of the 17th ACM Great Lakes symposium on VLSI table of contents
Stresa-Lago Maggiore, Italy
POSTER SESSION: Poster session 2 table of contents
Pages: 505 - 508  
Year of Publication: 2007
ISBN:978-1-59593-605-9
Authors
Marcello Mura  ALaRI- Faculty of Informatics USI, Lugano, Switzerland
Marco Paolieri  ALaRI- Faculty of Informatics USI, Lugano, Switzerland
Luca Negri  Politecnico di Milano, Milan, Italy
Maria Giovanna Sami  Politecnico di Milano, Milan, Italy
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 1,   Downloads (12 Months): 41,   Citation Count: 1
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ABSTRACT

In this paper we present a tool that converts specifications written with a subset of StateCharts into SystemC behavioral models. The main advantages of such an approachare rapidity of use, simplicity and reusability. Various systems can be modeled at different levels of abstraction andaccuracy through StateCharts and different peculiar aspects (e.g. energy, performances) can be taken into consideration. Moreover different parts of the design can be identified at different detail levels. The kernel of the simulator is fully discussed together with its mapping to the semantics of our StateCharts diagrams. As a case study we present here a model of the IBM PowerPC 750 Cache system and the respective SystemC simulator automatically generated by our tool.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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PowerPC 750 microprocessor datasheet. Technical report, IBM Microelectronics Division, 2002.
 
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I-Logix. Statemate. http://www.ilogix.com.
 
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MathWorks. Stateflow. http://www.mathworks.com.
 
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G. D. Micheli and R. Gupta. Hardware/Software co-design. In Proc. of IEEE, Mar. 1997.
 
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M. Mura, M. Paolieri, F. Fabbri, L. Negri, and M. Sami. Power modeling and power analysis of IEEE 802.15.4: a concurrent state machine approach. In Proc. CCNC, Jan. 2007.
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K. D. Nguyen. Model-driven SoC design via executable UML to SystemC.
 
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P. Palatin. MicroLib: http://ppc750sim.microlib.org
 
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D. Singh, J. Rabaey, M. Pedram, F. Catthoor, S. Rajgopal, N. Sehgal, and T. Mozdzen. Power conscious CAD tools and methodologies: a perspective. In Proc. of IEEE, Apr. 1995.
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Collaborative Colleagues:
Marcello Mura: colleagues
Marco Paolieri: colleagues
Luca Negri: colleagues
Maria Giovanna Sami: colleagues