| Active bank switching for temperature control of the register file in a microprocessor |
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Great Lakes Symposium on VLSI
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Proceedings of the 17th ACM Great Lakes symposium on VLSI
table of contents
Stresa-Lago Maggiore, Italy
POSTER SESSION: Poster session 1
table of contents
Pages: 231 - 234
Year of Publication: 2007
ISBN:978-1-59593-605-9
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Authors
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Kimish Patel
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University of Southern California, Los Angeles, CA
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Wonbok Lee
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University of Southern California, Los Angeles, CA
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Massoud Pedram
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University of Southern California, Los Angeles, CA
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Downloads (6 Weeks): 2, Downloads (12 Months): 38, Citation Count: 3
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ABSTRACT
An effective thermal management scheme, called active bank switching, for temperature control in the register file of a microprocessor is presented. The idea is to divide the physical register file into two equal-sized banks, and to alternate between the two banks when allocating new registers to the instruction operands. Experimental results show that this periodic active bank switching scheme achieves 3.4°C of steady-state temperature reduction, with a mere 0.75% average performance penalty.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Hector Sanchez , Belli Kuttanna , Tim Olson , Mike Alexander , Gian Gerosa , Ross Philip , Jose Alvarez, Thermal Management System for High Performance PowerPCTM Microprocessors, Proceedings of the 42nd IEEE International Computer Conference, p.325, February 23-26, 1997
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Kevin Skadron , Mircea R. Stan , Wei Huang , Sivakumar Velusamy , Karthik Sankaranarayanan , David Tarjan, Temperature-aware microarchitecture, Proceedings of the 30th annual international symposium on Computer architecture, June 09-11, 2003, San Diego, California
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HotSpot at: http://lava.cs.virginia.edu/HotSopt/
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Simplescalar at: http://www.simplescalar.com
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SPEC2000INT benchmark at: http://www.spec.org/cpu
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MPEG-2 Programs at: http://www.mpeg2.de/video/
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Pentium IV floor-plan at: http://www.chip-architect.com
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CITED BY 3
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David Atienza , Giovanni De Micheli , Luca Benini , José L. Ayala , Pablo G. Del Valle , Michael DeBole , Vijay Narayanan, Reliability-aware design for nanometer-scale devices, Proceedings of the 2008 conference on Asia and South Pacific design automation, January 21-24, 2008, Seoul, Korea
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