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Estimating path delay distribution considering coupling noise
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Source Great Lakes Symposium on VLSI archive
Proceedings of the 17th ACM Great Lakes symposium on VLSI table of contents
Stresa-Lago Maggiore, Italy
SESSION: Test and reliability table of contents
Pages: 61 - 66  
Year of Publication: 2007
ISBN:978-1-59593-605-9
Authors
Rajeshwary G. Tayade  University of Texas at Austin, Austin, TX
Vijay Kiran Kalyanam  Advanced Micro Devices Inc., Austin, TX
Sani Nassif  IBM, Austin, TX
Michael Orshansky  University of Texas at Austin, Austin, TX
Jacob Abraham  University of Texas at Austin, Austin, TX
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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ABSTRACT

Accurately estimating critical path delays is extremely important for yield optimization and for path selection in delay testing. It is well known that dynamic effects such ascoupling noise can significantly affect critical path delays. In traditional static timing analysis, the coupling effect isincorporated by estimating the switching window overlaps between aggressor and victim and then assuming a constant (worst case) coupling factor if any overlap is present. However in path based statistical timing analysis, using a constant coupling factor can overestimate the mean delay while under estimating the delay variance. In this paper, we propose a technique to estimate the dynamic variation in pathdelay caused by coupling noise. We treat the effective coupling capacitance as a random variable that varies as a function of the relative signal arrival times between victim andaggressor nodes. A modeling technique to estimate the capacitance variation is shown and a framework that gives therelative signal arrival time distribution at the victim nodesis developed.


REFERENCES

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Collaborative Colleagues:
Rajeshwary G. Tayade: colleagues
Vijay Kiran Kalyanam: colleagues
Sani Nassif: colleagues
Michael Orshansky: colleagues
Jacob Abraham: colleagues