| On the potential of asynchronous pipelined processors |
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ACM SIGARCH Computer Architecture News
archive
Volume 18 , Issue 4 (December 1990)
table of contents
Pages: 27 - 34
Year of Publication: 1990
ISSN:0163-5964
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Authors
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Ran Ginosar
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Technion - Israel Institute of Technology, Haifa, Israel
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Nick Michell
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University of Utah, Dept. o.f Computer Science, 3190 Merrill Engineering Building, Salt Lake City, Utah
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Downloads (6 Weeks): 2, Downloads (12 Months): 8, Citation Count: 1
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ABSTRACT
An asynchronous version of the pipelined R3000 and DLX processors, the A3000, is being designed. Simulation was employed to investigate the potential speed-up obtainable due to the asynchronous operation. Preliminary results show up to a 64% improvement in performance.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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5. Ginosar, R., and Wolf, T. A3000: an asynchronous version of the r3000. Computer Science Department, University of Utah, in preparation.
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