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Towards a formal theory of on chip communications in the ACL2 logic
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Source ACM International Conference Proceeding Series; Vol. 205 archive
Proceedings of the sixth international workshop on the ACL2 theorem prover and its applications table of contents
Seattle, Washington
SESSION: Session 3 table of contents
Pages: 47 - 56  
Year of Publication: 2006
ISBN:0-9788493-0-2
Authors
Julien Schmaltz  Saarland University, Saarbrücken, Germany
Dominique Borrione  Joseph Fourier University, Grenoble, France
Publisher
ACM  New York, NY, USA
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ABSTRACT

This paper is devoted to the expression for a formal theory of communication networks in the ACL2 logic. More precisely, we have developed a generic model called GeNoC, in a general mathematical notation, with the use of quantification over variables as well as over functions. We present here its expression in the first order quantifier free logic of the ACL2 theorem prover. We describe our systematic approach to cast it into ACL2, especially how we use the encapsulation principle to obtain a systematic methodology to specify and validate on chip communications architectures. We summarize the different instances of GeNoC developed so far in ACL2, some come from industrial designs. We illustrate our approach on an XY routing algorithm.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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J. Schmaltz. Une formalisation fonctionnelle des communications sur la puce. PhD thesis, Joseph Fourier University, Grenoble, France, January 2006. In French. A partial translation is available upon request to the first author.
 
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J. Schmaltz and D. Borrione. Verification of a Parameterized Bus Architecture Using ACL2. In Proceedings of the Fourth International Workshop on the ACL2 Theorem Prover and its Applications, April 2003.
 
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J. Schmaltz and D. Borrione. A Functional Approach to the Formal Specification of Networks on Chip. In A. Hu and A. Martin, editors, Formal Methods in Computer-Aided Design (FMCAD'04), volume 3312 of LNCS, pages 52--66, Austin, Tx, USA, November 2004. Springer-Verlag.
 
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J. Schmaltz and D. Borrione. A Generic Network on Chip Model. In T. Melham and J. Hurd, editors, Theorem Proving in Higher Order Logics (TPHOLs'05), volume 3603 of LNCS, pages 310--325, Oxford, UK, August 2005. Springer-Verlag.
 
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G. Spirakis. Beyond Verification: Formal Methods in Design. In A. Hu and A. Martin, editors, Formal Methods in Computer-Aided Design (FMCAD'04), volume 3312 of LNCS, Austin, Texas, USA, November 2004. Springer-Verlag. Invited Speaker.


Collaborative Colleagues:
Julien Schmaltz: colleagues
Dominique Borrione: colleagues