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Integrating FPGAs in high-performance computing: introduction
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Source International Symposium on Field Programmable Gate Arrays archive
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays table of contents
Monterey, California, USA
SESSION: Integrating FPGAs in high-performance computing table of contents
Pages: 131 - 131  
Year of Publication: 2007
ISBN:978-1-59593-600-4
Authors
Paul Chow  University of Toronto, Toronto, Ontario, Canada
Mike Hutton  Altera Corp., San Jose, CA
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): n/a,   Downloads (12 Months): n/a,   Citation Count: 1
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CITED BY
Like Yan , Gang Wang , Tianzhou Chen, The input-aware dynamic adaptation of area and performance for reconfigurable accelerator, Proceeding of the ACM/SIGDA international symposium on Field programmable gate arrays, February 22-24, 2009, Monterey, California, USA

INDEX TERMS

Primary Classification:
  C. Computer Systems Organization
  C.1 PROCESSOR ARCHITECTURES
      C.1.3 Other Architecture Styles
          Subjects: Adaptable architectures

Additional Classification:
  C. Computer Systems Organization
  C.1 PROCESSOR ARCHITECTURES
      C.1.3 Other Architecture Styles
          Subjects: Heterogeneous (hybrid) systems


General Terms:
Algorithms, Design, Performance


Keywords:
co-processor, compute acceleration, high-performance computing, reconfigurable computing

Collaborative Colleagues:
Paul Chow: colleagues
Mike Hutton: colleagues

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