| Data structures and algorithms for simplifying reversible circuits |
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ACM Journal on Emerging Technologies in Computing Systems (JETC)
archive
Volume 2 , Issue 4 (October 2006)
table of contents
Pages: 277 - 293
Year of Publication: 2006
ISSN:1550-4832
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Authors
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Aditya K. Prasad
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Amazon.com Inc., Seattle, WA
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Vivek V. Shende
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University of Michigan, Ann Arbor, MI
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Igor L. Markov
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University of Michigan, Ann Arbor, MI
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John P. Hayes
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University of Michigan, Ann Arbor, MI
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Ketan N. Patel
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Qualcomm Inc., Campbell, CA
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Downloads (6 Weeks): 9, Downloads (12 Months): 86, Citation Count: 2
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ABSTRACT
Reversible logic is motivated by low-power design, quantum circuits, and nanotechnology. We develop a compact representation of small reversible circuits to generate and store optimal circuits for all 40,320 three-input reversible functions, and millions of four-input circuits. This allows implementing a function optimally in constant time for use in the peephole optimization of larger circuits produced by existing techniques, and guarantees that every three-bit subcircuit is optimal. To generate subcircuits, we use a graph-based data structure and algorithms for circuit restructuring. Finally, we demonstrate a suboptimal circuit for which peephole optimization fails.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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