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The XTREM power and performance simulator for the Intel XScale core: Design and experiences
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Source ACM Transactions on Embedded Computing Systems (TECS) archive
Volume 6 ,  Issue 1  (February 2007) table of contents
SECTION: 1 - Special Section table of contents
Article No. 4  
Year of Publication: 2007
ISSN:1539-9087
Authors
Gilberto Contreras  Princeton University, Princeton, NJ
Margaret Martonosi  Princeton University, Princeton, NJ
Jinzhang Peng  Intel Corp., Santa Clara, California
Guei-Yuan Lueh  Intel Corp., Santa Clara, California
Roy Ju  AMD, Sunnyvale, CA
Publisher
ACM  New York, NY, USA
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ABSTRACT

Managing power concerns in microprocessors has become a pressing research problem across the domains of computer architecture, CAD, and compilers. As a result, several parameterized cycle-level power simulators have been introduced. While these simulators can be quite useful for microarchitectural studies, their generality limits how accurate they can be for any one chip family. Furthermore, their hardware focus means that they do not explicitly enable studying the interaction of different software layers, such as Java applications and their underlying runtime system software. This paper describes and evaluates XTREM, a power-simulation tool tailored for the Intel XScale microarchitecture. In building XTREM, our goals were to develop a microarchitecture simulator that, while still offering size parameterizations for cache and other structures, more accurately reflected a realistic processor pipeline. We present a detailed set of validations based on multimeter power measurements and hardware performance counter sampling. XTREM exhibits an average performance error of only 6.5% and an even smaller average power error: 4%. The paper goes on to present an application study enabled by the simulator. Namely, we use XTREM to produce an energy consumption breakdown for Java CDC and CLDC applications. Our simulator measurements indicate that a large percentage of the total energy consumption (up to 35%) is devoted to the virtual machine's support functions.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
Gilberto Contreras: colleagues
Margaret Martonosi: colleagues
Jinzhang Peng: colleagues
Guei-Yuan Lueh: colleagues
Roy Ju: colleagues