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Improving the performance of parallel backprojection on a reconfigurable supercomputer
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Source Conference on High Performance Networking and Computing archive
Proceedings of the 2006 ACM/IEEE conference on Supercomputing table of contents
Tampa, Florida
POSTER SESSION: Posters table of contents
Article No. 149  
Year of Publication: 2006
ISBN:0-7695-2700-0
Authors
Sponsors
IEEE : Institute of Electrical and Electronics Engineers
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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ABSTRACT

Reconfigurable supercomputing is a new direction of research in the quest for novel high-performance architectures. A handful of products are available in this field, but no architecture has emerged as the clear winner in performance. Using the US Air Force Research Labs' Heterogeneous High Performance Cluster (HHPC), we have developed a successful reconfigurable supercomputing implementation of synthetic aperture radar (SAR) image formation using backprojection, a highly parallel algorithm. By studying the architectural features of the HHPC and hand-tuning the application to those features, we estimate that better than 1000x speedup over a single-node software-only solution is feasable. In particular, we consider the movement of data between nodes, the movement of data between host PC and FPGA board, and the use of on-board memories available to the FPGA for data storage. These results indicate that reconfigurable supercomputers are an excellent choice to tackle highly-parallel large-dataset problems.


Collaborative Colleagues:
Ben Cordes: colleagues
Miriam Leeser: colleagues
Eric Miller: colleagues
Richard Linderman: colleagues