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CellSs: a programming model for the cell BE architecture
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Source Conference on High Performance Networking and Computing archive
Proceedings of the 2006 ACM/IEEE conference on Supercomputing table of contents
Tampa, Florida
SESSION: Technical papers table of contents
Article No. 86  
Year of Publication: 2006
ISBN:0-7695-2700-0
Authors
Pieter Bellens  Barcelona Supercomputing Center and UPC, Jordi Girona, Barcelona, (SPAIN)
Josep M. Perez  Barcelona Supercomputing Center and UPC, Jordi Girona, Barcelona, (SPAIN)
Rosa M. Badia  Barcelona Supercomputing Center and UPC, Jordi Girona, Barcelona, (SPAIN)
Jesus Labarta  Barcelona Supercomputing Center and UPC, Jordi Girona, Barcelona, (SPAIN)
Sponsors
IEEE : Institute of Electrical and Electronics Engineers
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 19,   Downloads (12 Months): 106,   Citation Count: 25
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ABSTRACT

In this work we present Cell superscalar (CellSs) which addresses the automatic exploitation of the functional parallelism of a sequential program through the different processing elements of the Cell BE architecture. The focus in on the simplicity and flexibility of the programming model. Based on a simple annotation of the source code, a source to source compiler generates the necessary code and a runtime library exploits the existing parallelism by building at runtime a task dependency graph. The runtime takes care of the task scheduling and data handling between the different processors of this heterogeneous architecture. Besides, a locality-aware task scheduling has been implemented to reduce the overhead of data transfers. The approach has been implemented and tested with a set of examples and the results obtained since now are promising.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Badia, R. M., Labarta, J., Sirvent, R., Pérez, J. M., Cela, J. M., and Grima, R. 2003. Programming grid applications with GRID superscalar. Journal of Grid Computing 1, 2, 151--170.
 
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Compunity, 2006. The community of OpenMP users, researchers, tool developers and provider website. http://www.compunity.org/.
 
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Gonzalez, M., Balart, J., Duran, A., Martorell, X., and Ayguadé, E. 2004. Nanos mercurium: a research compiler for OpenMP. In Proceedings of the European Workshop on OpenMP,-.
 
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Gs, 2006. GRID superscalar homepage. http://www.bsc.es/grid/grid_superscalar/.
 
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IBM, 2006. PowerPC hosted environment for the cell broadband engine version 1.0.1. http://www.bsc.es/projects/deepcomputing/linuxoncell/cellsimulator/ppc-cellsimulator-sdk1.0.1.html.
 
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Perez, J. M., Badia, R. M., and Labarta, J. 2006. Scalar-aware grid superscalar. DAC technical report UPC-DAC-RR-CAP-2006-12, Universitat Politècnica de Catalunya, Computer Architecture Department, www.ac.upc.edu.
 
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Pham, D., and Al. 2005. The design and implementation of a first-generation cell processor. In Proceedings of the 2005 IEEE International Solid-State Circuits Conference (ISSCC), 184--185.
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CITED BY  25

Collaborative Colleagues:
Pieter Bellens: colleagues
Josep M. Perez: colleagues
Rosa M. Badia: colleagues
Jesus Labarta: colleagues