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Multi-Core for HPC: breakthrough or breakdown?
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Source Conference on High Performance Networking and Computing archive
Proceedings of the 2006 ACM/IEEE conference on Supercomputing table of contents
Tampa, Florida
PANEL SESSION: Panels table of contents
Article No. 73  
Year of Publication: 2006
ISBN:0-7695-2700-0
Authors
Sponsors
IEEE : Institute of Electrical and Electronics Engineers
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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ABSTRACT

A dramatic trend in computing is the adoption of multi-core technology by the vendors from which our current and future HPC systems are being derived. Multi-core is offered as a path to continued reliance and benefits of Moore's Law while reining in the previously unfettered growth of power consumption and design complexity. Are we saved? or is it but a fools mission, trapping us in a technical cul de sac with no long term direction and no way to reinvent an alternative future. The panel will consider the following questions:* Can multi-core span the next decade of Moore's Law progression?* Are the pins and caches a strangle hold on the future effectiveness of multi-core?* Can innovative algorithmic techniques exploit the opportunities and address the challenges of multi-core?* How will programming models and supporting system software change to accommodate the unique properties and peculiarities of multi-core structures?


Collaborative Colleagues:
Thomas Sterling: colleagues
Peter Kogge: colleagues
William J Dally: colleagues
Steve Scott: colleagues
William Gropp: colleagues
David Keyes: colleagues
Pete Beckman: colleagues