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Templates and automation for temporal query generation
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Source ACM Southeast Regional Conference archive
Proceedings of the 44th annual Southeast regional conference table of contents
Melbourne, Florida
SESSION: Software engineering I table of contents
Pages: 80 - 84  
Year of Publication: 2006
ISBN:1-59593-315-8
Authors
Hong Liu  Embry-Riddle Aeronautical University, Daytona Beach, FI
David P. Gluch  Embry-Riddle Aeronautical University, Daytona Beach, FI
Publisher
ACM  New York, NY, USA
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ABSTRACT

This paper presents preliminary results in defining templates and a framework for an automation tool for generating temporal logic queries from the expected properties of requirements documents specified in natural Language. Specifically, we first extend the theoretic results published in [16]from Linear Temporal Logic (LTL) to Computation Tree Logic (CTL). Then we present a template to elicit informal queries in a form that can be automatically mapped to either LTL or CTL queries. These efforts are the foundation for the development of a Java-based formal query generation tool that will facilitate the generation of formal queries from informal specifications. The tool will be integrated into the OSATE Eclipse-based analysis and design environment for the Society of Automotive Engineers (SAE) standard---the Architecture Analysis & Design Language (AADL) [1].


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
The SAE Architecture Analysis & Design Language (AADL) www.aadl.info.
 
2
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4
Comella-Dorda, S., David P. Gluch, et al., Model-Based Verification: Claim Creation Guidelines, (CMU/SEI-2001-TN-018). Pittsburgh, Pa.: Software Engineering Institute, Carnegie Mellon University, October 2001.
 
5
Dov Dori, Object-Process Methodology, Springer, 2002. www.ObjectProcess.org.
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Feiler, P. H.; Gluch, D. P.; Hudak, J. J.; Lewis, B. A. "Pattern-Based Analysis of an Embedded Real-time System Architecture," Proceedings of the Workshop on Architecture Description Languages (WADL04) at the IFIP World Computer Congress August, 27 2004.
 
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Feiler, P.; Gluch, D.; Hudak, J.; Lewis, B. Embedded Systems Architecture Analysis Using SAE AADL, Pittsburgh, PA: Software Engineering Institute, Carnegie Mellon University, Technical Note: CMU/SEI-2004-TN-005, June, 2004.
 
9
Gluch, D. P., Comella-Dorda, S., Hudak, J.; Lewis, G.; & Weinstock, C., Model-Based Verification: Guidelines for Generating Expected Properties, (CMU/SEI-2002-TN-003), Pittsburgh, Pa. Software Engineering Institute, Carnegie Mellon University, 2002.
 
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Lewis, G.; Comella-Dorda, S; Gluch, D. P.; Hudak, J.; & Weinstock, C., Model-Based Verification: Analysis Guidelines, (CMU/SEI-2001-TN-028). Pittsburgh, Pa.: Software Engineering Institute, Carnegie Mellon University, December 2001.
 
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16
H. Liu, D. P. Gluch, Query Generation Guidelines and Consideration to Statecharts of Object-Oriented Designs, Proceeding of the Conference of Advances in Computer Sciences and Technology sponsored by IASTED (International Association of Science and Technology For Development). 11, 2004, Page 209--214.
 
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K. Myers, K. Dionne, V. Vijay, S. Dunlap, D. P. Gluch., "The Practical Use of Model Checking in Software Development", Proceedings IEEE Southeast Conference, 2002, 0-7803-7252-2/02, P. 21--27.
 
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Collaborative Colleagues:
Hong Liu: colleagues
David P. Gluch: colleagues