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Efficient pattern mining on shared memory systems: implications for chip multiprocessor architectures
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Source Memory System Performance archive
Proceedings of the 2006 workshop on Memory system performance and correctness table of contents
San Jose, California
SESSION: Workload optimization table of contents
Pages: 31 - 40  
Year of Publication: 2006
ISBN:1-59593-578-9
Authors
Gregory Buehrer  The Ohio State University, Columbus, OH
Yen-Kuang Chen  Intel Corporation, Santa Clara, CA
Srinivasan Parthasarathy  The Ohio State University, Columbus, OH
Anthony Nguyen  Intel Corporation, Santa Clara, CA
Amol Ghoting  The Ohio State University, Columbus, OH
Daehyun Kim  Intel Corporation, Santa Clara, CA
Sponsor
SIGPLAN: ACM Special Interest Group on Programming Languages
Publisher
ACM  New York, NY, USA
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ABSTRACT

Frequent pattern mining is a fundamental data mining process which has practical applications ranging from market basket data analysis to web link analysis. In this work, we show that state-of-the-art frequent pattern mining applications are inefficient when executing on a shared memory multiprocessor system, due primarily to poor utilization of the memory hierarchy. To improve the efficiency of these applications, we explore memory performance improvements, task partitioning strategies, and task queuing models designed to maximize the scalability of pattern mining on SMP systems. Empirically, we show that the proposed strategies afford significantly improved performance. We also discuss implications of this work in light of recent trends in micro-architecture design, particularly chip multiprocessors (CMPs).


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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Collaborative Colleagues:
Gregory Buehrer: colleagues
Yen-Kuang Chen: colleagues
Srinivasan Parthasarathy: colleagues
Anthony Nguyen: colleagues
Amol Ghoting: colleagues
Daehyun Kim: colleagues