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Scratchpad memory management for portable systems with a memory management unit
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Source International Conference On Embedded Software archive
Proceedings of the 6th ACM & IEEE International conference on Embedded software table of contents
Seoul, Korea
SESSION: Architectures and performance analysis table of contents
Pages: 321 - 330  
Year of Publication: 2006
ISBN:1-59593-542-8
Authors
Bernhard Egger  Seoul National University, Korea
Jaejin Lee  Seoul National University, Korea
Heonshik Shin  Seoul National University, Korea
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
ACM: Association for Computing Machinery
SIGBED: ACM Special Interest Group on Embedded Systems
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 13,   Downloads (12 Months): 121,   Citation Count: 8
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ABSTRACT

In this paper,we present a dynamic scratchpad memory allocation strategy targeting a horizontally partitioned memory subsystem for contemporary embedded processors. The memory subsystem is equipped with a memory management unit (MMU), and physically addressed scratchpad memory (SPM)is mapped into the virtual address space. A small minicache is added to further reduce energy consumption and improve performance.Using the MMU's page fault exception mechanism, we track page accesses and copy frequently executed code sections into the SPM before they are executed. Because the minimal transfer unit between the external memory and the SPM is a single memory page, good code placement is of great importance for the success of our method. Based on profiling information, our postpass optimizer divides the application binary into pageable, cacheable, and uncacheable regions. The latter two are placed at fixed locations in the external memory, and only pageable code is copied on demand to the SPM from the external memory. Pageable code is grouped into sections whose sizes are equal to the physical page size of the MMU. We discuss code grouping techniques and also analyze the effect of the minicache on execution time and energy consumption. We evaluate our SPM allocation strategy with twelve embedded applications, including MPEG-4. Compared to a fully-cached configuration, on average we achieve a 12% improvement in runtime performance and a 33% reduction in energy consumption by the memory system.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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CITED BY  8

Collaborative Colleagues:
Bernhard Egger: colleagues
Jaejin Lee: colleagues
Heonshik Shin: colleagues