| Code transformation strategies for extensible embedded processors |
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International Conference on Compilers, Architecture and Synthesis for Embedded Systems
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Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
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Seoul, Korea
POSTER SESSION: Short presentations with posters II
table of contents
Pages: 242 - 252
Year of Publication: 2006
ISBN:1-59593-543-6
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Downloads (6 Weeks): 5, Downloads (12 Months): 51, Citation Count: 4
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ABSTRACT
Embedded application requirements, including high performance, low power consumption and fast time to market, are uncommon in the broader domain of general purpose applications. In order to satisfy these demands, chip manufacturers often provide developers with the possibility to define application-specific Instruction Set Extensions (ISEs). Many techniques have been proposed that automatically identify the most beneficial ISEs from source code, so that compilers can identify the 'best' instruction set for the underlying machine. However, can we simply retrofit these techniques into a traditional compiler, or does ISE identification demand different tuning of the heuristics utilized throughout the optimization pipeline? In this paper, we show why compilers should sometimes make different decisions when targeting customized processors, and we show how traditional ISE identification techniques can improve significantly if the code is properly transformed in order to expose more beneficial extensions. The proposed approach was validated using the SimpleScalar simulator for the ARM processor, augmented with the possibility to define additional instructions.Using benchmarks taken from the MiBench suite,we show that the proposed transformations improve state of the art ISE identi cation techniques by 55% on average and 4x maximum.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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