| Automatic generation of transaction level models for rapid design space exploration |
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International Conference on Hardware Software Codesign
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Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
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Seoul, Korea
SESSION: Transaction-level modeling and exploration
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Pages: 64 - 69
Year of Publication: 2006
ISBN:1-59593-370-0
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Authors
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Dongwan Shin
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University of California, Irvine, CA, USA
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Andreas Gerstlauer
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University of California, Irvine, CA, USA
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Junyu Peng
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University of California, Irvine, CA, USA
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Rainer Dömer
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University of California, Irvine, CA, USA
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Daniel D. Gajski
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University of California, Irvine, CA, USA
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Downloads (6 Weeks): 15, Downloads (12 Months): 54, Citation Count: 3
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ABSTRACT
Transaction-level modeling has been touted to improve simulation performance and modeling efficiency for early design space exploration. But no tools are available to generate such transaction-level models from abstract input descriptions. Designers have to write such models manually, which is a tedious and error-prone task, and one of bottlenecks in improving designer's productivity. In this paper, we propose a method to generate transaction-level models from virtual architecture models where components communicate via abstract message-passing channels. We have applied our approach to a set of industrial-strength examples with a wide range of target architectures. Experimental results show that significant productivity gains can be achieved, demonstrating the effectiveness and benefits of our approach for rapid, early exploration of communication design space.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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[doi> 10.1145/378239.379015]
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A. Gerstlauer, G. Schirner, D. Shin, and J. Peng. Necessary and sufficient functionality and parameters for SoC Communication. CECS, Univ. of California, Irvine, Tech. Rep. CECS-TR-06-1, May 2006.
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Andreas Wieferink , Rainer Leupers , Gerd Ascheid , Heinrich Meyr , Tom Michiels , Achim Nohl , Tim Kogel, Retargetable generation of TLM bus interfaces for MP-SoC platforms, Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, September 19-21, 2005, Jersey City, NJ, USA
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