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Automatic generation of transaction level models for rapid design space exploration
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Source International Conference on Hardware Software Codesign archive
Proceedings of the 4th international conference on Hardware/software codesign and system synthesis table of contents
Seoul, Korea
SESSION: Transaction-level modeling and exploration table of contents
Pages: 64 - 69  
Year of Publication: 2006
ISBN:1-59593-370-0
Authors
Dongwan Shin  University of California, Irvine, CA, USA
Andreas Gerstlauer  University of California, Irvine, CA, USA
Junyu Peng  University of California, Irvine, CA, USA
Rainer Dömer  University of California, Irvine, CA, USA
Daniel D. Gajski  University of California, Irvine, CA, USA
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
ACM: Association for Computing Machinery
SIGBED: ACM Special Interest Group on Embedded Systems
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 11,   Downloads (12 Months): 52,   Citation Count: 3
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ABSTRACT

Transaction-level modeling has been touted to improve simulation performance and modeling efficiency for early design space exploration. But no tools are available to generate such transaction-level models from abstract input descriptions. Designers have to write such models manually, which is a tedious and error-prone task, and one of bottlenecks in improving designer's productivity. In this paper, we propose a method to generate transaction-level models from virtual architecture models where components communicate via abstract message-passing channels. We have applied our approach to a set of industrial-strength examples with a wide range of target architectures. Experimental results show that significant productivity gains can be achieved, demonstrating the effectiveness and benefits of our approach for rapid, early exploration of communication design space.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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CoWare Platform Architect. Available at http://www.coware.com/products/platformarchitect.php.
 
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ARM MaxSim Tools. Available at http://www.arm.com/products/DevTools/MaxSim.html.
 
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D. D. Gajski, J. Zhu, R. Dömer, A. Gerstlauer, and S. Zhao. SpecC: Specification Language and Methodology. Kluwer Academic Publishers, Jan. 2000.
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A. Gerstlauer, G. Schirner, D. Shin, and J. Peng. Necessary and sufficient functionality and parameters for SoC Communication. CECS, Univ. of California, Irvine, Tech. Rep. CECS-TR-06-1, May 2006.
 
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Collaborative Colleagues:
Dongwan Shin: colleagues
Andreas Gerstlauer: colleagues
Junyu Peng: colleagues
Rainer Dömer: colleagues
Daniel D. Gajski: colleagues