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ABSTRACT
Exploiting thread level parallelism is paramount in the multicore era. Transactions enable programmers to expose such parallelism by greatly simplifying the multi-threaded programming model. Virtualized transactions (unbounded in space and time) are desirable, as they can increase the scope of transactions' use, and thereby further simplify a programmer's job. However, hardware support is essential to support efficient execution of unbounded transactions. In this paper, we introduce Page-based Transactional Memory to support unbounded transactions. We combine transaction bookkeeping with the virtual memory system to support fast transaction conflict detection, commit, abort, and to maintain transactions' speculative data.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 19
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Chi Cao Minh , Martin Trautmann , JaeWoong Chung , Austen McDonald , Nathan Bronson , Jared Casper , Christos Kozyrakis , Kunle Olukotun, An effective hybrid transactional memory system with strong isolation guarantees, ACM SIGARCH Computer Architecture News, v.35 n.2, May 2007
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Jayaram Bobba , Kevin E. Moore , Haris Volos , Luke Yen , Mark D. Hill , Michael M. Swift , David A. Wood, Performance pathologies in hardware transactional memory, ACM SIGARCH Computer Architecture News, v.35 n.2, May 2007
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Ferad Zyulkyarov , Vladimir Gajinov , Osman S. Unsal , Adrián Cristal , Eduard Ayguadé , Tim Harris , Mateo Valero, Atomic quake: using transactional memory in an interactive multiplayer game server, Proceedings of the 14th ACM SIGPLAN symposium on Principles and practice of parallel programming, February 14-18, 2009, Raleigh, NC, USA
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Ferad Zyulkyarov , Adrian Cristal , Sanja Cvijic , Eduard Ayguade , Mateo Valero , Osman Unsal , Tim Harris, WormBench: a configurable workload for evaluating transactional memory systems, Proceedings of the 9th workshop on MEmory performance: DEaling with Applications, systems and architecture, p.61-68, October 26-26, 2008, Toronto, Canada
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