An empirical study of the CRAY Y-MP processor using the Perfect club benchmarks

Subscribe (Full Service)


	Search: The ACM Digital Library The Guide

	Feedback

An empirical study of the CRAY Y-MP processor using the Perfect club benchmarks

Full text

Pdf (1.33 MB)

Source

International Symposium on Computer Architecture archive
Proceedings of the 18th annual international symposium on Computer architecture table of contents

Toronto, Ontario, Canada

Pages: 170 - 179

Year of Publication: 1991

ISBN:0-89791-394-9

Also published in ...

Authors

Sriram Vajapeyam	Computer Sciences Department, University of Wisconsin, Madison, WI
Gurindar S. Sohi	Computer Sciences Department, University of Wisconsin, Madison, WI
Wei-Chung Hsu	Cray Research, Inc., Development Division, Chippewa Falls, WI

Sponsors

IEEE-CS : Computer Society
SIGARCH: ACM Special Interest Group on Computer Architecture

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 10, Downloads (12 Months): 20, Citation Count: 3

Additional Information:

references cited by index terms collaborative colleagues

Tools and Actions:	Review this Article Save this Article to a Binder Display Formats: BibTeX EndNote ACM Ref

DOI Bookmark:	Use this link to bookmark this Article: http://doi.acm.org/10.1145/115952.115970 What is a DOI?

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	"The CRAY X-MP Series of Computer Systems," Cray Research Inc., Publication No. MP-2101,1984.
	2	"'rhe CRAY Y-MP Series of Computer Systems," Cray Research Inc., Publication No. CCMP-0301, February 1988.
	3	T. L. Adams , R. E. Zimmerman, An analysis of 8086 instruction set usage in MS DOS programs, Proceedings of the third international conference on Architectural support for programming languages and operating systems, p.152-160, April 03-06, 1989, Boston, Massachusetts, United States
	4	D. W. Clark , P. J. Bannon , J. B. Keller, Measuring VAX 8800 performance with a histogram hardware monitor, Proceedings of the 15th Annual International Symposium on Computer architecture, p.176-185, May 30-June 02, 1988, Honolulu, Hawaii, United States
	5	G. Cybenko, L. Kipp, L. Pointer, and D. Kuck, "Supercomputer Performance Evaluation and the Perfect Ben-chmarks," in CSRD Report No. 965, University of Illinois, March 1990.
	6	Joel S. Emer , Douglas W. Clark, A Characterization of Processor Performance in the vax-11/780, Proceedings of the 11th annual international symposium on Computer architecture, p.301-310, January 1984
	7	Thomas R. Gross , John L. Hennessy , Steven A. Przybylski , Christopher Rowen, Measurement and evaluation of the MIPS architecture and processor, ACM Transactions on Computer Systems (TOCS), v.6 n.3, p.229-257, Aug. 1988 [doi>10.1145/45059.45060]
	8	David A. Patterson , John L. Hennessy, Computer architecture: a quantitative approach, Morgan Kaufmann Publishers Inc., San Francisco, CA, 1990
	9	W. W. Hwu , T. M. Conte , P. P. Chang, Comparing software and hardware schemes for reducing the cost of branches, Proceedings of the 16th annual international symposium on Computer architecture, p.224-233, April 1989, Jerusalem, Israel
	10	N. P. Jouppi , D. W. Wall, Available instruction-level parallelism for superscalar and superpipelined machines, Proceedings of the third international conference on Architectural support for programming languages and operating systems, p.272-282, April 03-06, 1989, Boston, Massachusetts, United States
	11	J. Kohn, "JUMPTRACE," Cray Research Inc. Report, A pril 1989.
	12	S. McFarling , J. Hennesey, Reducing the cost of branches, Proceedings of the 13th annual international symposium on Computer architecture, p.396-403, June 02-05, 1986, Tokyo, Japan
	13	F.H. McMahon, The Livermore FORTRAN Kernels: A Computer Test of the Numerical Performance Range. Research Rep0rt-Lawrence Livermore Laboratories, December 1986.
	14	C.L. Mitchell and M. J. Flynn, "A Workbench for Computer Architects," IEEEDesign and Test of Computers, Feburary 1988.
	15	J. Rubinstein and D. MacGregor, "'A,, Performance Analysis of MC68020-based Systems, IEEE Micro, December 1985.
	16	James E. Smith , James R. Goodman, A study of instruction cache organizations and replacement policies, Proceedings of the 10th annual international symposium on Computer architecture, p.132-137, June 13-17, 1983, Stockholm, Sweden
	17	Gurindar S. Sohi , Sriram Vajapeyam, Tradeoffs in instruction format design for horizontal architectures, Proceedings of the third international conference on Architectural support for programming languages and operating systems, p.15-25, April 03-06, 1989, Boston, Massachusetts, United States

CITED BY 3

	Sriram Vajapeyam , Wei-Chung Hsu, On the instruction-level characteristics of scalar code in highly-vectorized scientific applications, ACM SIGMICRO Newsletter, v.23 n.1-2, p.20-28, Dec. 1992
	Peter L. Bird , Alasdair Rawsthorne , Nigel P. Topham, The effectiveness of decoupling, Proceedings of the 7th international conference on Supercomputing, p.47-56, July 19-23, 1993, Tokyo, Japan
	Umesh Krishnaswamy , Isaac D. Scherson, A Framework for Computer Performance Evaluation Using Benchmark Sets, IEEE Transactions on Computers, v.49 n.12, p.1325-1338, December 2000