ACM Portal
  Subscribe (Full Service)    Register (Limited Service, Free)    Login
  Search:   The ACM Digital Library   The Guide
  
ACM Home Page
Please provide us with feedback. Feedback
Energy implications of multiprocessor synchronization
Full text PdfPdf (49 KB)
Source ACM Symposium on Parallel Algorithms and Architectures archive
Proceedings of the eighteenth annual ACM symposium on Parallelism in algorithms and architectures table of contents
Cambridge, Massachusetts, USA
SESSION: Multicores, multiprocessor systems and grids table of contents
Pages: 329 - 329  
Year of Publication: 2006
ISBN:1-59593-452-9
Authors
Tali Moreshet  Brown University, Providence, RI
R. Iris Bahar  Brown University, Providence, RI
Maurice Herlihy  Brown University, Providence, RI
Sponsors
ACM: Association for Computing Machinery
SIGACT: ACM Special Interest Group on Algorithms and Computation Theory
SIGARCH: ACM Special Interest Group on Computer Architecture
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 4,   Downloads (12 Months): 39,   Citation Count: 0
Additional Information:

references   index terms   collaborative colleagues  

Tools and Actions: Request Permissions Request Permissions    Review this Article  
DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/1148109.1148166
What is a DOI?

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
J. W. Chung et al. The common case transactional behavior of multithreaded programs. In HPCA, pages 271--282, February 2006.
2
Maurice Herlihy , Victor Luchangco , Mark Moir , William N. Scherer, III, Software transactional memory for dynamic-sized data structures, Proceedings of the twenty-second annual symposium on Principles of distributed computing, p.92-101, July 13-16, 2003, Boston, Massachusetts  [doi>10.1145/872035.872048]
3
Maurice Herlihy , J. Eliot B. Moss, Transactional memory: architectural support for lock-free data structures, Proceedings of the 20th annual international symposium on Computer architecture, p.289-300, May 16-19, 1993, San Diego, California, United States
 
4
Peter S. Magnusson , Anders Landin , Erik Hagersten, Queue Locks on Cache Coherent Multiprocessors, Proceedings of the 8th International Symposium on Parallel Processing, p.165-171, April 01, 1994
5
John M. Mellor-Crummey , Michael L. Scott, Algorithms for scalable synchronization on shared-memory multiprocessors, ACM Transactions on Computer Systems (TOCS), v.9 n.1, p.21-65, Feb. 1991  [doi>10.1145/103727.103729]
 
6
K. E. Moore, J. Bobba, M. J. Moravan, M. D. Hill, and D. A. Wood. LogTM: Log-based Transactional Memory. In HPCA, pages 258--269, February 2006.
 
7
A. Welc, S. Jagannathan, and A. L. Hosking. Transactional monitors for concurrent objects. In ECOOP, June 2004.

INDEX TERMS

Primary Classification:
  C. Computer Systems Organization
  C.1 PROCESSOR ARCHITECTURES
      C.1.2 Multiple Data Stream Architectures (Multiprocessors)


General Terms:
Design


Keywords:
energy aware, multiprocessor, transactional memory

Collaborative Colleagues:
Tali Moreshet: colleagues
R. Iris Bahar: colleagues
Maurice Herlihy: colleagues

The ACM Portal is published by the Association for Computing Machinery. Copyright © 2009 ACM, Inc.
Terms of Usage   Privacy Policy   Code of Ethics   Contact Us

Useful downloads: Adobe Acrobat    QuickTime    Windows Media Player    Real Player