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Systematic temperature sensor allocation and placement for microprocessors
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 43rd annual Design Automation Conference table of contents
San Francisco, CA, USA
SESSION: Session 33: low-power, thermal-aware architectures table of contents
Pages: 542 - 547  
Year of Publication: 2006
ISBN:1-59593-381-6
Authors
Rajarshi Mukherjee  Northwestern University, Evanston, IL
Seda Ogrenci Memik  Northwestern University, Evanston, IL
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 11,   Downloads (12 Months): 66,   Citation Count: 4
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ABSTRACT

Modern high performance processors employ advanced techniques for thermal management, which rely on accurate readings of on-die thermal sensors. As the importance of thermal effects on reliability and performance of integrated circuits increases careful planning and embedding of thermal monitoring mechanisms into these systems will be crucial. Systematic tools for analysis of thermal behavior and determination of best allocation and placement of thermal sensing elements is therefore a highly relevant problem. In this paper, we propose novel optimization techniques for determining the optimal locations and allocations for thermal sensors to provide a high fidelity thermal profile of a complex microprocessor system. Our algorithm identifies an optimal physical location for each sensor such that the sensor's the attraction towards steep thermal gradient is maximized. We also present a hybrid allocation and placement strategy showing the trade-offs associated with number of sensors used and expected accuracy. Our results show that our tool is able to create a sensor distribution for a given microprocessor architecture providing thermal measurements with maximum error of 3.18°C and average maximum error of 1.63°C across a wide set of applications.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Sankaranarayanan, K., et al., A Case for Thermal-Aware Floorplanning at the Microarchitectural Level. The Journal of Instruction-Level Parallelism, 2005. 7: p. 1--16.
5
 
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Rotem, E., et al. Analysis of Thermal Monitor features of the Intel® Pentium® M Processor. in TACS Workshop. 2004.
7
 
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Krinitsin, V. Pentium 4 and Athlon XP: Thermal Conditions. http://www.digit-life.com/articles/pentium4athlonxpthermalmanagement/.
 
9
SPEC-CPU2000. Standard Performance Evaluation Council, Performance Evaluation in the New Millennium, Version 1.1. 2000.
 
10
Powell, M.D., et al. Heat-and-Run: Leveraging SMT and CMP to Manage Power Density Through the Operating System. in ASPLOS. 2004.
11
 
12
 
13
 
14
Gunther, S., et al., Managing the Impact of Increasing Microprocessor Power Consumption. Intel Technology Journal, February 2001.
 
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Bratek, P. and A. Kos. Temperature Sensors Placement Strategy for Fault Diagnosis in Integrated Circuits. in SEMI-THERM. 2001.
 
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Meguerdichian, S., et al. Coverage Problems in Wireless Ad-hoc Sensor Networks. in INFOCOM. 2001.
 
17
Chvatal, V., A Combinatorial Theorem in Plane Geometry. Journal of Combinatorial Theory 1975. 18: p. 39--41.
 
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MacQueen, J. Some Methods for Classification and Analysis of Multivariate Observations. in Fifth Berkeley Symposium on Mathematical Statistics and Probability. 1967.
 
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Collaborative Colleagues:
Rajarshi Mukherjee: colleagues
Seda Ogrenci Memik: colleagues